Apparatus and a method for embedding dynamic state machines in a

Static information storage and retrieval – Powering

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365227, 365229, 326 93, 326 95, H03K 1900

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active

057128260

ABSTRACT:
An apparatus and a method for embedding a dynamic state machine in a static integrated circuit environment. A static integrated circuit environment which is capable of suspending operation during a power down clock-stopped condition and resuming operation from a stored state at the conclusion of the power down condition is combined with a dynamic state machine featuring dynamic latches embedded in the static integrated circuit environment. The disclosed dynamic state machine is also configured to suspend operation during the power down condition and resume operation after the power down condition from the stored stated. In addition, both the static integrated circuit environment and the embedded dynamic state machine draw minimal power during the power down condition. With the dynamic state machine embedded in the static integrated circuit environment of the present invention, faster overall circuit operation is realized with less clock capacitance, with less integrated circuit area utilized as well as reduced power consumption.

REFERENCES:
patent: 5481731 (1996-01-01), Conary et al.
patent: 5587672 (1996-12-01), Ranganathan et al.

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