Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock
Patent
1986-06-26
1988-11-22
Miller, S. D.
Electrical transmission or interconnection systems
Personnel safety or limit control features
Interlock
307297, 307270, 323289, H03K 333, H03K 301, G05F 140
Patent
active
047868279
ABSTRACT:
Described is an antisaturation circuit for an integrated PNP transistor characterized by a comparator circuit comprising two transistors and a current generator whose output current corresponds to a pre-established function, e.g., an exponential function, of the emitter current of said transistor. The changing of state of the comparator circuit, as determined by said pre-established function of said current generator, is determined by the drop of the V.sub.CE voltage of the transistor below a preset minimum value, with a portion of the conduction current of one of the two transistors of the comparator circuit utilized for increasing the forced .beta. of the transistor. This limits the degree of its saturation, as well as the leakage current toward the substrate.
REFERENCES:
patent: 3697860 (1972-10-01), Baker
patent: 4064448 (1977-12-01), Eatock
patent: 4479052 (1984-10-01), Suzki
Gariboldi Roberto
Morelli Marco
Davis B. P.
Miller S. D.
SGS Microelettronica S.p.A.
LandOfFree
Antisaturation circuit for integrated PNP transistor with interv does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Antisaturation circuit for integrated PNP transistor with interv, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Antisaturation circuit for integrated PNP transistor with interv will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-436873