Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1997-04-18
1999-03-23
Tran, Minh Loan
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257513, 257640, 257649, H01L 2900
Patent
active
058863915
ABSTRACT:
Inventive antireflective structures comprise a semiconductor substrate having thereon a combination of a plurality of layers that either that absorb reflected light or that dissipate reflected light into patterns and intensities that do not substantially alter photoresist material on the semiconductor substrate. The semiconductor substrate has formed thereon a feature having a width of less than about 0.25 microns. Antireflective structures contemplated include a first layer of polysilicon and first layer of silicon nitride material that is formed upon the first layer of polysilicon. The antireflective structure has the ability to scatter unabsorbed light into patterns and intensities that are substantially ineffective to alter photoresist material exposed to said patterns and intensities. A first antireflective structure comprises a first layer of polysilicon disposed upon on a semiconductor substrate, a second layer of silicon nitride material disposed upon the first layer of polysilicon, and a masking layer disposed upon the second layer of silicon nitride material. A second antireflective structure comprises a first layer of polysilicon disposed upon on a semiconductor substrate, a first layer of nitride material disposed upon the first layer of polysilicon, a second layer of polysilicon disposed upon the first layer of silicon nitride material, and a masking layer disposed upon the second layer of polysilicon. A third antireflective structure comprises a first layer of polysilicon disposed upon on a semiconductor substrate, a first layer of silicon nitride material disposed upon the first layer of polysilicon, a second layer of polysilicon disposed upon the first layer of silicon nitride material, a second layer of silicon nitride material disposed upon the second layer of polysilicon, and a masking layer disposed upon the second layer of silicon nitride material.
REFERENCES:
patent: 4541167 (1985-09-01), Havemann et al.
patent: 5229316 (1993-07-01), Lee et al.
patent: 5259924 (1993-11-01), Mathews et al.
Gonzalez Fernando
Niroomand Ardavan
Micro)n Technology, Inc.
Tran Minh Loan
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