Antimetastable state circuit

Details Antimetastable state circuit Antimetastable state circuit

1990-01-03

1991-05-28

Miska, Vit W.

Horology: time measuring systems or devices

Time interval

Electrical or electromechanical

G04F 800, G04F 1000

Patent

active

050200380

ABSTRACT:
An antimetastable state circuit which detects when a data edge is so close to a clock edge that it would result in a metastable state in a time measurement circuit is provided. When a potential metastable state is detected, the antimetastable circuit delays the data edge with respect to the clock edge by a known amount so as to avoid the metastable state. The delayed edge is used to start the time measurement circuit, and the next clock edge is used to stop the time measurement circuit. When the known delay has been added, it is subtracted from the measured time, to produce an accurate measurement of the elapsed time between the rise of the data edge and the rise of the clock edge.

REFERENCES:
patent: 3983481 (1976-09-01), Nutt et al.
patent: 4160154 (1979-01-01), Jennings
patent: 4613951 (1986-09-01), Chu
patent: 4637733 (1987-01-01), Charles et al.

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