Antifuse structure with increased breakdown at edges

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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257 50, 257209, 257529, H01L 2904, H01L 4900, H01L 2702

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054752531

ABSTRACT:
An antifuse is provided which includes a first conductive layer, an antifuse layer formed on the first conductive layer, and a second conductive layer formed on the antifuse layer. A portion of the antifuse layer forms a substantially orthogonal angle with the first conductive layer and the second conductive layer. This "corner" formation of the antifuse enhances the electric field at this location during programming, thereby providing a predictable location for the filament, i.e. the conductive path between the first and second conductive layers. This antifuse provides other advantages including: a relatively low programming voltage, good step coverage for the antifuse layer and the upper conductive layer, a low, stable resistance value, and minimal shearing effects on the filament.

REFERENCES:
patent: 5070384 (1991-12-01), McCollum et al.
patent: 5181096 (1993-01-01), Forouhi
Chiang, S.; Forouhi, R.; Chen, W.; Hawley, F.; McCollum, J.; Hamdy, E.; and Hu, C., "Antifuse Structure Comparison for Field Programmable Gate Arrays", Actel Corp. IEEE Copyright 1992, pp. 24.6.1-24.6.4.
Cook, B. and Keller, S., "Amorphous Silicon Antifuse Technology for BiPolar Proms", BiPolar Circuits and Technology Meeting-Copyright 1986 IEEE, pp. 99-100.

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