Antifuse structure and method of making

Details Antifuse structure and method of making Antifuse structure and method of making

2003-03-12

2004-01-13

Ho, Hoai (Department: 2818)

Semiconductor device manufacturing: process

Direct application of electrical current

To alter conductivity of fuse or antifuse element

C438S131000, C438S600000, C438S957000, C438S257000

Reexamination Certificate

active

06677220

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to antifuse structures, and is more particularly related to thermal isolation of antifuse structures and methods of making same.
BACKGROUND OF THE INVENTION
Antifuse structures include a material which initially has a high resistance but which can be converted into a low resistance material by the application of a programming voltage. The programming voltage is in excess of a breakdown voltage of the high resistance material. The high resistance material is an electrically insulating antifuse layer which is sandwiched between a pair of electrically conductive layers. Each electrically conductive layer in the pair is generally considered an electrode of the antifuse structure. The high resistance material, also called an antifuse material, is non-conductive when manufactured but is caused to become permanently conductive by application of the programming voltage across the pair of electrically conductive layers.
When the programming voltage across the pair of electrically conductive layers, which is in excess of a breakdown voltage of the antifuse layer, is applied across the antifuse layer, an electrically conductive filament forms in the antifuse layer. The newly formed electrically conductive filament in the antifuse layer, which can be as narrow as several atoms in width, is effective as an electrical short of the two electrically conductive layers, thus programming the antifuse structure. Those antifuse structures that remain unprogrammed have no electrically conductive filament connecting their respective pair of electrically conductive layers.
Antifuse structures can be used in certain classes of IC chips such as field programmable gate arrays (FPGAs), programmable read-only memories (PROMs) and the like. FPGAs typically include a large number of logic elements, such as AND gates and OR gates, which can be selectively coupled to perform user designed functions. Programming a FPGA is generally accomplished by applying a programming voltage to selected antifuse structures thereby converting them into conductive interconnections.
In the programming of the antifuse structure, there is an inherent dependence upon the amount of thermal energy required to be applied to the antifuse material to facilitate formation of an electrically conductive filament in the antifuse material. Antifuse structures are prone to thermal energy losses during the programming process. This thermal energy dissipates from the electrodes of the antifuse structure through interfacing regions of high thermal conductivity instead of being constrained to the antifuse layer and interfaces of the electrodes and the antifuse layer. This dissipation results in higher energy injection needed to make an electrically conductive filament, as well as more time for heating being required to cause the filament formation. It is desirable to avoid or lower the dissipation of thermal energy from the antifuse electrodes to reduce the time and power required to program antifuse structures.
SUMMARY OF THE INVENTION
In one embodiment, an antifuse structure has an antifuse between first and second thermal conduction regions. Each of the first and second thermal conduction regions has a portion of low thermal conductivity and a portion of high thermal conductivity. The portion having low thermal conductivity is between the respective portion of high thermal conductivity and the antifuse.
These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.


REFERENCES:
patent: 6541312 (2003-04-01), Cleeves et al.
patent: 6541363 (2003-04-01), Zhang

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