Antifuse programming circuit in which one stage of...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit

Reexamination Certificate

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C327S526000

Reexamination Certificate

active

10958358

ABSTRACT:
The antifuse programming circuit of the present invention includes a plurality of antifuses, a first transistor for selecting an antifuse for programming from among the plurality of antifuses, and a second transistor. A selection signal for selecting an antifuse is applied to the gate of the first transistor, and a first power supply is connected to the source of the first transistor. In addition, a second power supply is connected to the drain of the second transistor, and the drain of the first transistor is connected to the source of the second transistor. Finally, a programming voltage is applied to one terminal of the antifuse, and the drain of the first transistor is connected to the other terminal of the antifuse.

REFERENCES:
patent: 6163488 (2000-12-01), Tanizaki et al.
patent: 6194738 (2001-02-01), Debenham et al.
patent: 6333667 (2001-12-01), Lee
patent: 6400632 (2002-06-01), Tanizaki et al.
patent: 2001-243787 (2001-09-01), None
Kyeong-Sik Min et al., A Post-Package Bit-Repair Scheme Using Static Latches with Bipolar-Voltage Programmable Antifuse Circuit for High-Density DRAMs, 2001 Symposium on VLSI Circuits Digest of Tech. Papers, pp. 67-68.
Joo-Sun Choi et al., “Antifuse EPROM Circuit for Field Programmable DRAM,” 2000 IEEE International Solid-State Circuits Conference, pp. 406-407.

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