Antifuse circuit with well bias transistor

Details Antifuse circuit with well bias transistor Antifuse circuit with well bias transistor

2007-12-25

2007-12-25

Le, Thao X. (Department: 2809)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C356S225000, C257S050000, C438S131000

Reexamination Certificate

active

11456366

ABSTRACT:
An antifuse circuit includes a terminal, an antifuse transistor, and a bias transistor. The antifuse transistor is formed on a substrate. The antifuse transistor is coupled to the terminal and includes a first gate terminal coupled to receive a first select signal. The bias transistor is coupled between the substrate and a bias voltage terminal. The bias transistor has a second gate terminal and is operable to couple the bias voltage terminal to the substrate responsive to an assertion of a bias enable signal at the second gate terminal.

REFERENCES:
patent: 5680360 (1997-10-01), Pilling et al.
patent: 6351425 (2002-02-01), Porter
patent: 6515344 (2003-02-01), Wollesen
patent: 6515931 (2003-02-01), Marr et al.
patent: 6936909 (2005-08-01), Marr et al.
patent: 6985387 (2006-01-01), Chen et al.
patent: 7157782 (2007-01-01), Shih et al.
patent: 2005/0024973 (2005-02-01), Porter et al.

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