Anti-fuse one-time-programmable nonvolatile memory

Details Anti-fuse one-time-programmable nonvolatile memory Anti-fuse one-time-programmable nonvolatile memory

2005-05-06

2009-12-29

Fahmy, Wael (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S528000, C257S529000, C257S050000, C257SE23147

Reexamination Certificate

active

07638855

ABSTRACT:
An anti-fuse one-time-programmable (OTP) nonvolatile memory cell has a P well substrate with two P−doped regions. Another N+doped region, functioning as a bit line, is positioned adjacent and between the two P−doped regions on the substrate. An anti-fuse is defined over the N+doped region. Two insulator regions are deposited over the two P−doped regions. An impurity doped polysilicon layer is defined over the two insulator regions and the anti-fuse. A polycide layer is defined over the impurity doped polysilicon layer. The polycide layer and the polysilicon layer function as a word line. A programmed region, i.e., a link, functioning as a diode, is formed on the anti-fuse after the anti-fuse OTP nonvolatile memory cell is programmed. The array structure of anti-fuse OTP nonvolatile memory cells and methods for programming, reading, and fabricating such a cell are also disclosed.

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