Anti-fuse memory device with switched capacitor setting method

Details Anti-fuse memory device with switched capacitor setting method Anti-fuse memory device with switched capacitor setting method

1992-01-28

1994-03-29

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read only systems

Fusible

365100, 365102, 365103, 3652257, 257530, G11C 1716

Patent

active

052991520

ABSTRACT:
A semiconductor device includes memory cells each of which include a plurality of groups of an anti-fuse and a transistor connected in series; a capacitor including first and second electrodes, with the first electrode connected to a bit line of the memory cell; a first switch connected between the bit line and a power source; a second switch connected between the power source and the second electrode of the capacitor; and a third switch connected between the second electrode of the capacitor and a ground. A specific memory cell is selected out of the memory cells, and a superposed supply voltage is applied through the capacitor to the anti-fuse of the specific memory by turning on and/or off the first through third switches, so that a storage of information in the memory cell can be performed.

REFERENCES:
patent: 4899205 (1990-02-01), Hamdy et al.
E. Hamdy et al.; "Dielectric Based Antifuse For Logic and Memory ICs"; pp. 786-789, 1988 IEDM Conf. Proc.

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