Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Reexamination Certificate
1998-12-28
2001-10-23
Le, Vu A. (Department: 2824)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
C438S215000, C438S281000, C438S600000, C257S529000, C257S530000
Reexamination Certificate
active
06306689
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory apparatus and a fabrication method of the same, and in particular to an anti-fuse for programming a redundancy cell, a repair circuit having a programming apparatus, and a fabrication method of the anti-fuse which are capable of simply implementing a programming operation when exchanging a defective cell of a semiconductor memory apparatus with a redundancy cell.
2. Description of the Conventional Art
Generally, in the semiconductor memory apparatus, a plurality of redundancy cells of a memory are connected by the block formed of sub-arrays. For example, extra rows and columns are connected at every 256K cell array for thereby exchanging a defective memory cell with an extra cell by the unit of row and column. In such a repair circuit, when a wafer fabrication process is completed, the defective cells are removed based on a predetermined test, and an address signal of a corresponding redundancy cell is changed in an internal circuit through a programming operation, so that when an address corresponding to a defective line is inputted during an actual use, the line is exchanged with a line of a corresponding cell. As the programming methods, an electric fuse method which is capable of melting and cutting a fuse using an over-current, a method for burning the fuse using a laser beam, a method for making a junction portion short-circuit using a laser beam, etc. are known. Among these methods, the method for cutting the fuse using a laser beam is simple, and in this method, it is possible to easily implement a desired layout.
However, in the laser-based programming method, a repair process which needs an expensive laser apparatus for exchanging a defective cell with a redundancy cell is used. In addition, a laser beam is radiated onto the fuse by an additional fuse window process for cutting the same, and then the programming and a passivation process are performed, whereby the repair process is complicated.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a semiconductor memory apparatus and a fabrication method of the same which overcome the aforementioned problems encountered in the conventional art.
It is another object of the present invention to provide an anti-fuse for programming a redundancy cell and a repair circuit having a programming apparatus which are capable of enhancing a fabrication yield and reliability of a memory apparatus by easily exchanging a defective cell with a redundancy cell using a threshold voltage of a dielectric film without using an expensive laser apparatus.
It is another object of the present invention to provide an anti-fuse fabrication method for programming a redundancy cell which makes it possible to easily exchange a defective cell with a redundancy cell using a threshold voltage of a dielectric film.
In order to achieve the above objects, there is provided a repair circuit which includes a half power voltage supplier for supplying a half power voltage, a programming voltage supplier for supplying a programming voltage for exchanging a defective cell of the memory cell array with a redundancy cell, a ground voltage supplier for supplying a ground electric potential in response to an address signal of the memory cell, an anti-fuse for receiving a voltage of the half power voltage supplier and charging the same in the normal operation and breaking a dielectric film in accordance with a voltage difference between the programming voltage supplier and the ground voltage supplier during the programming operation for thereby implementing a programming, and an output unit for outputting an output signal based on the programmed state of the anti-fuse in accordance with a voltage applied from a node commonly connected with the half power voltage supplier, the programming voltage supplier, and the anti-fuse.
In order to achieve the above objects, there is provided an anti-fuse of a repair circuit for programming a redundancy cell which includes a lower electrode having a spacer having its apex at an outer portion of the same, a dielectric film formed on an upper portion of the lower electrode, and an upper electrode formed on an upper portion of the dielectric film, whereby the dielectric film contacting with the spacer of the lower electrode is broken during the programming.
In order to achieve the above objects, there is provided an anti-fuse fabrication method of a repair circuit for programming a redundancy cell which includes the steps of forming a lower interlayer insulation film on an upper portion of a semiconductor device including a dopant implantation region formed on a semiconductor substrate, forming a lower electrode contacting with a dopant implantation region of the semiconductor device through a contact hole in the lower interlayer insulation film and having a spacer having its apex at an outer portion of the same, forming a dielectric film on an upper portion of the lower electrode, and forming an upper electrode on an upper portion of the dielectric film.
Additional advantages, objects and other features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims as a result of the experiment compared to the conventional arts.
REFERENCES:
patent: 4651409 (1987-03-01), Ellsworth et al.
patent: 5308795 (1994-05-01), Hawley et al.
patent: 5602053 (1997-02-01), Zheng et al.
patent: 5723358 (1998-03-01), Manley
patent: 5726483 (1998-03-01), Dennison
Chang Myoung-Sik
Kim Jin-Kook
Kim Mi-Ran
Hyundai Electronics Industries Co,. Ltd.
Le Vu A.
Oliff & Berridg,e PLC
Wilson Christian D.
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