Anisotropic wet etching

Details Anisotropic wet etching Anisotropic wet etching

1998-08-06

2002-05-28

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Liquid phase etching

C438S753000, C216S041000

Reexamination Certificate

active

06395645

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method for anisotropic wet etching, especially to a method for anisotropic wet etching with corner compensation effects and the etching mask for use in the wet etching. The method of the present invention is especially suited in the preparation of multi-level structure of silicon semiconductor.
BACKGROUND OF THE INVENTION
In the applications of semiconductor materials, such as silicon materials, it is always necessary to have a two-level or a multi-level structure with corners particularly of a rectangular angle. Among the methods for the preparation of such cornered multi-level structure, the anisotropic wet etching is frequently used, due to its relatively low cost and its being suited for mass production.
In order to prepare a semiconductor material such as Si(100) using the anisotropic wet etching, an etching mask is first prepared on the surface of the substrate. A pattern is formed in the etching mask using conventional lithography and etching technologies. Materials suited for the etching mask include any etching resistant material which is resistant to etchant(s) used in the etching process for a substantial period of time. The assembly so prepared is then put in an etchant. If the semiconductor substrate is a Si (100) substrate, the etchant is generally a solution of KOH and water. Since the pattern of the etching mask includes masked areas and maskless areas (or intervals), some areas on the surface of the semiconductor substrate are covered while others are exposed to the etchant.
While the substrate is put in-the etchant, the exposed areas on the surface of the semiconductor substrate will first be etched. As time passes, depth and width of the etched areas of the substrate increase, such that areas beneath the masked areas of the etching mask will also be etched off. If time permits, a planar surface will be generated under the masked and maskless areas of the etching mask.
In the conventional art, a two-level structure has been prepared by wet etching process, using an etching mask wherein step depth may be decided by the dimensions of the widths of the masked areas and the intervals, and the etching time. Furthermore, if the etching mask is divided into some zones and the widths of the masked areas and the intervals vary from zone to zone, depths of the etched areas will vary from zone to zone. A multi-level or terrace structure may thus be prepared. U.S. patent application Ser. No. 08/999,089 disclosed a method for the preparation of a diffraction lens. In this invention, a multistep terrace structure is prepared using a single photo mask by controlling widths of masked areas and intervals of the photo mask and factors during the etching process, such as temperature and concentration of etchant, etching time, misalignment angle etc.
When a multi-level structure is prepared, it is particularly necessary to produce corners of a rectangular, angle in the pattern or the topography. While the anisotropic wet etching approach is used, the etching rate at the corner areas is higher than that at the non-corner areas. This character brings failures in producing corners in the pattern or the topography. Particularly when a series of adjacent corners at different levels shall be produced, the integrity of the corners, will be damaged by the high etching rates at the corner areas of semiconductor substrate.
FIG.
1
(
a
) illustrates an etching mask for the preparation of a series of adjacent corners, as used in the conventional anisotropic wet etching technology. FIG.
1
(
b
) shows a photograph of a terrace structure prepared with the etching mask of FIG.
1
(
a
). As shown in FIG.
1
(
b
), the structure of the corner areas is severely damaged due to the high etching rate at these areas.
In order to solve this problem, the conventional art used the “corner compensation” technology to moderate the etching rate at the corner areas. In other words, compensational patterns are prepared at the corner areas of the etching mask such that etching of the substrate at the corner areas may be moderated. In the conventional art, the compensational patterns included: beams, triangles, squares, bands, split beams, combination of squares and beams and combination of bands and beams. Reference may be made to H. L. Offereins et al.: “Compensating Corner Under-Cutting of (100) Silicon in KOH”, Sensor and Materials, 3, 3 (1992), pp. 127-144.
Although the above-said conventional compensation technology is helpful to produce patterns with corners of nearly right angle, some problems are found. These include that additional space are required in preparing the compensational patterns, which brings wastes in photo masks and etching masks, that such compensation is not applicable to patterns with small scales and that it is not suited for terrace structures of more than two levels.
It is thus a need to have a novel method for anisotropic wet etching that is suited to prepare a multi-level structure with integrated adjacent corners.
It is also a need to have an etching mask for anisotropic wet etching wherein no additional space is required for the corner compensation patterns.
It is also necessary to have a method for anisotropic wet etching, which is suited to prepare terrace structures with small scales.
OBJECTIVES OF THE INVENTION
The objective of this invention is to provide a novel method for anisotropic wet etching that is suited to prepare a multi-level structure with integrated adjacent corners.
Another objective of this invention is to provide an etching mask for anisotropic wet etching wherein no additional space is required for the corner compensation patterns.
Another objective of this invention is to provide a method for anisotropic wet etching, which is suited to prepare terrace structures with small scales.
Another objective of this invention is to provide a multi-level structure for a semiconductor material with integrated adjacent corners.
SUMMARY OF THE INVENTION
According to this invention, a photo mask for the etching mask of multi-level structure suited in the anisotropic wet etching is disclosed. In the photo mask, a pattern with a series of adjacent corners having a substantially rectangular, angle is formed. At the corner areas compensational patterns comprising buffer grids are prepared. The pattern on the photo mask is then transferred to an etching mask of a semiconductor substrate such that terrace structure with integrated corners may be prepared during the anisotropic wet etching of the substrate. The method of this invention is also applicable to semiconductor materials with the same diamond structure as that of silicon.
The above and other objectives and advantages of this invention may be clearly understood from the detailed description by referring to the following drawings.


REFERENCES:
patent: 3735483 (1973-05-01), Sheldon
patent: 3765969 (1973-10-01), Kragness et al.
patent: 4542397 (1985-09-01), Biegelsen et al.
patent: 4600934 (1986-07-01), Aine et al.
patent: 5817174 (1998-10-01), Tomita et al.
patent: 4325500 (1992-11-01), None
Terada et al., Method for Controlling Structure of Crystalline Surface. English Abstract of JP 4325500A, Nov. 13, 1992.

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