Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent
1997-10-03
1999-03-23
Arroyo, Teresa M.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
257784, 257686, H01L 2348, H01L 2302
Patent
active
058864121
ABSTRACT:
An offset die stacking arrangement is disclosed having at least one upper level die having a width which is less than the distance separating the opposing bonding sites of the underlying die. The lowest die is affixed to the substrate within a recess in the substrate. The upper die is fixed above the lower die and rotated within a plane parallel to the lower die through an angle which insures that none of the bonding sites of the lower die are obstructed by the upper die. Once the dice are fixed in this manner, the entire assembly is subjected to the wire bonding process with all of the bonds being made in the same step.
REFERENCES:
patent: 5422435 (1995-06-01), Takiar et al.
Ball Michael B.
Fogal Rich
Arroyo Teresa M.
Micro)n Technology, Inc.
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