Analyzing interconnect structures

Details Analyzing interconnect structures Analyzing interconnect structures

2007-10-30

2007-10-30

Rodriguez, Paul (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

Reexamination Certificate

active

10281857

ABSTRACT:
In one embodiment, an interconnect structure may be analyzed to determine electromagnetic characteristics of the structure by identifying structure seeds corresponding to the structure; modeling the structure seeds to obtain field patterns; and processing the field patterns to obtain the electromagnetic characteristics.

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Eli Chipout (IEEE 1998) teaches an “Interconnect and Substract Modeling and Analysis”, p. 1441-1452.
Restle et al. (IEEE 2001) teaches a full-wave PEEC time-domain method for the modeling of on-chip interconnects (p. 877-887).
Heeb et al., teaches a three-dimensional interconnect analysis using partial element equivalent circuit (IEEE 1992), pp. 974-982).
Feldmann et al., teaches an efficient techniques for modeling chip-level interconnect, substrate and packaging parasitics (ACM 1999), pp. 1-5).

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