Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Target device
Reexamination Certificate
2005-05-10
2005-05-10
Kim, Hong (Department: 2186)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Target device
C703S021000, C703S022000, C711S118000, C711S137000, C711S158000, C711S204000, C714S047300
Reexamination Certificate
active
06892173
ABSTRACT:
A system and method for analyzing the effectiveness of a computer cache memory. A bus with memory transactions is monitored. A subset of addresses, along with associated transaction data, on the bus is captured and stored in a memory. The captured addresses are applied to a software model of a computer cache. The capture process is repeated multiple times, each time with a different subset of the address space. Statistical estimates of hit rate and other parameters of interest are computed based on the software model. Multiple cache configurations may be modeled for comparison of performance. Alternatively, a subset of addresses along with associated transaction data is sent to a hardware model of a cache. The contents of the hardware model are periodically dumped to memory or statistical data may be computed and placed in the memory. Statistical estimates of hit rate and other parameters of interest are computed based on the contents of the memory.
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Gaither Blaine D.
Smith Robert B.
Kim Hong
Winfield Augustus W.
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