Analysis optimizer

Details Analysis optimizer Analysis optimizer

2007-11-08

2011-11-08

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Design of semiconductor mask or reticle

Analysis and verification

C716S053000, C716S054000, C716S055000, C716S111000, C430S005000, C700S098000, C700S108000, C700S121000, C378S035000, C382S145000, C382S154000

Reexamination Certificate

active

08056022

ABSTRACT:
A method of preparing a set of target layout data for the application of a photolithographic friendly design (LFD) analysis or other photolithographic analysis. The target layout data is revised to remove areas or features prior to performing the LFD analysis. The features removed include features that have been determined to print correctly, duplicate features and features that are not sensitive to variations in process conditions. The revised target layout is analyzed to determine if the features that remain will print correctly on a wafer.

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