Analysis circuit for a charge coupled device

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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307221D, 357 24, H03K 3353, G11C 1928, H01L 29718

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active

042726930

ABSTRACT:
A CCD arrangement which includes a semiconductor layer of a first conductivity type, a layer of insulating material on the semiconductor layer, a row of shift electrodes on the insulating layer. The row of shift electrodes on the insulating layer are fed with pulse train voltages displaced in phase relative to one another. The charges are fed to an output end diffusion zone of the opposite conductivity type which has previously been brought to a reference potential and then released from the latter producing a state which is not bound in potential to the exterior. One of the shift electrodes is connected via a terminal to a transistor switch which intermittently supplies the assigned pulse train voltage, and to the gate of a field effect capacitor whose counter electrode is fed with a periodic pulse voltage. The rising flanks of this pulse voltage are each delayed relative to the times at which the assigned pulse train voltage is interrupted. The terminal of the aforesaid one shift electrode is connected to the gate of a field effect capacitor which serves as a signal output.

REFERENCES:
patent: 3623132 (1971-11-01), Green
patent: 4048519 (1977-09-01), Hoffman et al.
MacLennan "Charge-Coupled Devices: 3-Signal Processing", Wireless World (2/75) pp. 61-65.
Kosonocky "Charge-Coupled Devices--An Overview", Wescon Technical Papers, vol. 18 (1974), session 2/1, pp. 1-20.

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