Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2001-05-21
2002-12-10
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S118000, C341S120000, C341S123000, C341S127000, C341S128000, C341S129000, C341S156000
Reexamination Certificate
active
06492929
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method and apparatus for converting an analogue input signal into a digital representation. In particular, the invention relates to an apparatus for providing a digital representation of an analogue signal having characteristics advantageous for waveform matching and prediction.
2. Discussion of Prior Art
Analogue to Digital Converters (ADCs) enable an analogue input signal to be converted into a digital representation of the input signal which preserves information contained in the input signal. In the simplest ADC form, the zero-crossing discriminator, the output changes from a logical naught to a logical one when the input voltage crosses a reference voltage of zero volts. The input signal is transformed into a hard-limited telegraph function [D. Middleton and J. H. Van Vleck, IEEE, 54, 1 (1966)]; a simple sequence of naughts and ones. The spectral information contained in the input signal is also contained in the telegraph function, subject to a scaling factor, because the spectral information in the output digital representation is principally carried in the time intervals between the zero-crossings.
More sophisticated ADCs comprise a number of threshold-crossing discriminators each with its own reference voltage, where adjacent reference voltages are spaced apart by a common amount. For example, the outputs of sixteen discriminators expressed as a binary code would indicate that the input voltage lay somewhere between two particular reference voltages. However, for any significant amount of noise at the input, the input signal cannot be considered static during the conversion processes, causing the output digital representation to change rapidly and be almost indeterminate. To overcome this problem the input signal is held constant using a “track and hold” circuit and the resulting unambiguous output digital representation during the “hold” phase is latched into a register by sample pulses which occur at equally spaced intervals of time. At the same time, the output digital representation may be made more compact.
Analogue to digital conversion methods in which the input analogue signal is periodically sampled at a predetermined constant rate and each sampled value is converted into a corresponding digital representation are standard. To convert analogue signals having high frequency components, a higher sampling rate must be used, resulting in an increased amount of output digital information. Furthermore, the high sampling rate results in an increased amount of unnecessary digital information for sections of the analogue input which have a relatively low frequency. For analogue signals having both high and low frequency components, a low sampling rate is not appropriate as the high frequency components cannot then be correctly identified. Conventionally, the choice of regular sampling rate is subject to the well known “Nyquist sampling criterion”.
Furthermore, constant sampling rate analogue to digital conversion techniques are not particularly suitable for waveform matching and time series recognition applications. By sampling an analogue input amplitude at a fixed rate, two similar signals evolving in two different timescales, such as a car engine running at two different speeds, will give rise to two different output digital representations. Even though the two signals originate from the same source, the two different output digital representations will not be recognised as such due to the different timescales with which the input signals evolve.
In time series recognition applications, the analysis of data in the time domain may be used to extract information from a single channel sensor. A time series may be used to construct a trajectory evolving through multi-dimensional phase space which evolves with time over the surface of a geometrical object. The comparison of one such geometrical object, in particular a standard one, with a measured one provides a comparison of the state of one physical system with another. U.S. Pat. No. 5,835,682 describes a Heuristic processor which computes a multi-dimensional, nonlinear, predictive model constrained to predict the next sample of the time series from which it was calculated. The input data to the Heuristic processor are digital representations of analogue source signals for which conventional uniform sampling rate ADCs are employed. However, the use of uniform sampling rate analogue to digital converters has the inherent problem of introducing inaccuracies in the comparison of the predicted to measured time series. This degrades the temporal dependence and therefore has limitations when used for time series recognition applications.
The foundations of a general theory for randomised signal processing are discussed by I. Bihnskis and A. Mikelsons in “Randomised Signal Processing” (1992, Prentice Hall) which exemplifies the problems and benefits associated with some methods for processing signals subjected to non uniform sampling in time. The theory of non-uniform sampling for the digital encoding of analogue sources has previously been proposed as a means for data compression [
IEEE Transactions on Communications, Vol. COM
-29,
No.
1, January 1981 pp.24-32]. In the scheme proposed in this paper, information about an analogue source signal is contained in a digital representation of the time intervals between the crossing of the input analogue signal and any of the number of fixed threshold levels and in the direction of the threshold level crossing (up or down). The scheme is disadvantageous in that the digital representation is not compact and represents the interval between threshold crossings as pairs of zeros output at a regular rate. The pairs of zeros are interspersed with a 2-digit binary code representing direction.
Another sampling technique for analogue to digital conversion is described in IEEE Transactions on Circuits and Systems—II: Analogue and Digital Signal Processing, Vol. 43, No. 4, April 1996. In this case, the final aim of the technique is to generate samples of the input signal that are uniformly spaced in time. This is done by recording the time instants at which the signal crosses any of the predetermined, fixed, quantisation levels, together with the specific quantisation level information, thus forming an output sequence consisting of “amplitude-time” ordered pairs. This forms a local reconstruction of the signal which is then re-sampled by interpolation to provide equal interval amplitude samples. Once again, a non-compact sequence of ordered pairs is used to represent the input signal.
U.S. Pat. No. 4,291,299 describes a non-uniform sampling analogue to digital converter for converting analogue signals with large, short-term amplitude excursions. Such signals typically occur on telephone lines affected by lightning strikes or from power system faults. The sampling is non-uniform in both time and amplitude. Before the signal is sampled, multiple predetermined, absolute voltage levels are set as threshold levels. The system samples an input analogue signal and, whenever the input signal or the difference signal between the analogue signal and its last preceding sample, crosses any of the multiple predetermined levels this is detected and a digital code representing the particular level crossed is output This digital code forms part of an output digital word which also comprises a timer circuit count representing the time which has elapsed since the preceding sample occurred
An alternative analogue to digital converter system is described by R. Greenhalgh (IBM Technical disclosure bulletin, Vol. 7, no. 9, February 1965 (1965-02)). This document describes a system in which threshold levels are set at A±(&Dgr;A/2), where A is an analogue representation of the digital value stored in a register. If the input signal crosses one of the thresholds the register is reset to the value of the threshold that has been crossed, and a digital signal is output from the system which contains a digital rep
Coffey Adrian S
Johnson Martin
Jones Robin
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