Analogue to digital converter

Details Analogue to digital converter Analogue to digital converter

1987-12-21

1989-07-18

Shoop, Jr., William M.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341118, 341127, H03M 114

Patent

active

048497592

ABSTRACT:
In a half-flash analogue to digital converter (ADC) for balanced signals, d.c. offset compensation is provided by means of two negative feedback arrangements 510 and 520. A first compensating signal LOFF is the time-average of the output of the middle comparator MC17 of the coarse converter stage and provides compensation of offsets in the most significant bits (MSB) of the output. A second compensating signal COFF is generated by an additional comparator MC34 to effect compensation of offsets re-introduced when a difference amplifier 404 forms the residual signal V.sub.LSB for the input to the fine converter stage.

REFERENCES:
patent: 4099173 (1978-07-01), Zeskind et al.
patent: 4352092 (1982-09-01), Masuda et al.
patent: 4380005 (1983-04-01), Debord et al.
patent: 4410876 (1983-10-01), Sawagata
patent: 4468651 (1984-08-01), Lechner et al.
patent: 4544917 (1985-10-01), Lenhoff, Jr.
patent: 4763107 (1988-08-01), Koen et al.

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