Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2007-09-11
2007-09-11
Barnie, Rexford (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000, C341S166000
Reexamination Certificate
active
11402894
ABSTRACT:
In an A/D conversion device, each delay unit in a pulse delay circuit has inverters INV of m×n stages (m, n are positive integers), a clock generator has m-delay lines, and each delay line has inverters INV of i×n stages (i=1, 2, . . . , and m). Those delay lines DL1to DLm output sampling clocks CK1to CKm. Each of those inverters INV has a same characteristic. In the A/D conversion device, the delay time in each of the delay lines DL1to DLm is adjusted by the number of the inverters INV. It is thereby possible to provide the m-sampling clocks CK1to CKm of a different phase ΔT with one another, namely whose phases are preciously shifted by ΔT with one another.
REFERENCES:
patent: 5396247 (1995-03-01), Watanabe et al.
patent: 6771202 (2004-08-01), Watanabe et al.
patent: 6879278 (2005-04-01), Watanabe et al.
patent: 2004-007385 (2004-01-01), None
Terazawa Tomohito
Watanabe Takamoto
Barnie Rexford
DENSO CORPORATION
Nguyen Khai M.
Posz Law Group , PLC
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