Image analysis – Image transformation or preprocessing – Correlation
Reexamination Certificate
1997-12-02
2003-04-08
Mehta, Bhavesh (Department: 2625)
Image analysis
Image transformation or preprocessing
Correlation
C348S301000, C348S312000, C348S323000, C382S234000, C382S236000
Reexamination Certificate
active
06546150
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a signal processing circuit for processing an analogue signal and, more particularly, to those for processing an output signal produced from an image sensor.
2. Brief Description of the Related Art
Up to now, an image reading apparatus, which detects an objective picture such as an original manuscript by use of an image sensor to transmit an image signal, has been known.
As the image sensors thereby used for obtaining aforesaid image signals, there exist Charge Coupled Device (referred to as “CCD” hereinafter)-type image sensors and Metal Oxide Semiconductor (referred to as “MOS”)-type image sensors. The CCD-type image sensors, which have many advantages such as a high sensitivity, a high integration density and low noise characteristics, have been particularly used.
Actually, an example of color CCD-type linear image sensors is illustrated in FIG.
6
. In
FIG. 6
, the color CCD-type linear image sensor
1601
is formed of a three-lined color CCD-type linear image sensor, wherein three pieces of CCD chips
1602
-
1604
provided respectively with a red, a green and a blue (referred to as “R”, “G” and “B” hereinafter) on-wafer-type color filters are disposed on a silicon wafer in parallel to each other.
Because each constitution of the R, the G and the B CCD chips is common in
FIG. 6
, the chip constitution is described only about the R chip. A light receiving part
161
formed of photoelectric transducing elements 1-5006, which transduce the optical energy to the electric energy in response to incident luminous quantities are aligned in a row. The R, the G and the B color separation filters are provided in an on-wafer status covering the CCD sensor elements constituting the light receiving part
161
. In a forefront of the light receiving part
161
formed of the CCD sensor elements aligned in a row, there exists further a light-shaded pixel which is formed by masking a pixel with an aluminium mask for shading an incident light, namely, the dummy element thereby to generate an output signal during a dark status.
Transfer gates
162
and
163
are to transfer charges, which have been accumulated in the light receiving part
161
in response to the incident luminous quantities, to CCD-type shift registers
164
and
165
when they receive a shift gate pulse PHI-TG. The charges, which have been accumulated in the pixels having odd numbers of the light receiving part
161
, are transferred through the transfer gates
162
to the CCD-type shift register
164
in use for the odd-numbered pixels. On the other hand, the charges, which are accumulated in the pixels having even numbers of the light receiving part
161
, are transferred through the transfer gate
163
to the CCD-type shift register
165
in use for even-numbered pixels.
The CCD-type shift registers
164
and
165
transfer the charges, which have been applied from the light receiving part
161
, to an output part. The CCD-type shift registers
164
and
165
are two phase-driven by a clock signal PHI-
1
(PHI-
1
R, PHI-
1
FR, PHI-
1
G, PHI-
1
FG, PHI-
1
B, PHI-
1
FB) in use for driving the odd-numbered pixels and another clock signal PHI-
2
(PHI-
2
R, PHI-
2
FR, PHI-
2
G, PHI-
2
FG, PHI-
2
B, PHI-
2
FB) in use for driving the even-numbered pixels.
Furthermore, an output gate
166
is to transmit each of the pixel charges stored in the CCD-type registers
164
and
165
into output capacitive ports
167
a
and
167
b,
which are to transform the transferred charges into voltage signals. Source follower amplifiers
168
a
and
168
b
each having two stages serve as circuits which prevent noises from accompanying with output signals by reducing output impedances. The output capacitive ports
167
a
and
167
b
together with the source follower amplifiers
168
a
and
168
b
constitute a Eloating Differential Amplifier (referred to as “FDA” hereinafter).
Herein an output signal terminal OSBR is a signal terminal thereby detecting a signal applied from the odd-numbered pixels of the red color chip. Another output signal terminal OSAR is a signal terminal thereby detecting a signal applied from the even-numbered pixels of the red color chip. Similarly, output signal terminals OSBG, OSAG, OSBB and OSAB are respective output signal terminals thereby detecting signals respectively applied from the odd-numbered pixels and the even-numbered pixels of the green and the blue chips, respectively. On the other hand, PHI-RBR, PHI-RAR, PHI-RBG, PHI-RAG, PHI-RBB and PHI-RAB are reset pulse terminals while PHI-
1
R, PHI-
1
G, PHI-
1
B, PHI-
2
R, PHI-
2
G and PHI-
2
B are clock terminals of the CCD-type shift registers. Similarly, PHI-TGR, PHI-TGG and PHI-TGB are clock terminals of the transfer gates while PHI-ODR, PHI-ODG and PHI-ODB are drain terminals of the source follower amplifiers.
In the color image sensor
1601
constituted as mentioned above, rays of the lights incident to the light receiving part
161
are transformed into electric charges, of which quantities are proportional to the luminous energies. Those electric charges are transferred to the CCD-type shift registers
164
and
165
by applying the clock pulse PHI-TGR to the transfer gates
162
and
163
, being separated into the odd-numbered image pixels and the even-numbered image pixels.
Subsequently, CCD pixel signals are applied bit by bit through the output gate
166
to the output capacitive ports
167
a
and
167
b
of the FDA in response to the driving clock pulses PHI-
1
and PHI-
2
. The output capacitive ports
167
a
and
167
b
transform the output signals produced as the charge signals into the voltage signals, which are then transmitted respectively through the two-staged source follower amplifiers
168
a
and
168
b
and through the output terminals OSB and OSA. As mentioned above, to read-out the charges stored in the CCD-type line sensor integrated in a high density by separating into two pixel groups, wherein one has the odd numbers and another has the even numbers, reduces a reset time and a signal processing time of the pixel.
Next, a signal processing circuitry shown in
FIG. 2
is used to process the ODD and EVEN image signals transmitted from aforesaid color CCD-type linear image sensor till a stage for converting into digital signals.
FIG. 4
is a timing chart during signal processing in the circuitry shown in FIG.
2
.
As shown in
FIG. 2
, an analogue signal processing system
38
, which transmits its own output signal to an analogue to digital (referred to “A/D” hereinafter) converter
39
by receiving the output signals produced from the CCD-type sensor
37
, is constituted of correlated dual sampling circuits
40
and
41
, amplifiers
58
and
59
and a multiplexer circuit
60
. The two output signals, which are transmitted from the CCD-type sensor
37
and have the same phase (Herein ODD signal means an output signal produced from pixels having the odd numbers of the CCD-type sensor while EVEN signal means another output signal produced from pixels having the even numbers.), are respectively subjected to two independent and equivalent analogue signal processings until they are sequentially selected and synthesized in the multiplexer circuit
60
. So the signal processing operation is described only about the circuit, which deals with the ODD signal.
As can be seen from
FIG. 4
, each pixel of the CCD output signal
94
has a reset period
86
, a feedthrough period
87
, a CCD clock component transmitting period
88
and a signal component transmitting period
89
. The CCD-type sensor
37
applies the signals, which have different off-sets with respect to a reset potential
90
, to each image pixel. The correlated dual sampling circuit
40
serves as a constitution which removes the off-sets and extracts precisely the signal components. This correlated dual sampling circuit
40
is composed of a sample-hold circuit
46
, which performs a sampling operation by applying a control signal
61
during the feedthrough period
87
, of another sample-hold circu
Canon Kabushiki Kaisha
Desire Gregory M.
Mehta Bhavesh
Robin Blecker & Daley
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