Analog voltage subtracting circuit and an A/D converter having t

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341118, H03M 114

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active

052835812

ABSTRACT:
An analog voltage subtracting circuit for calculating a difference between an analog input voltage and a voltage drop caused by a load includes an analog voltage generator 7 for generating an analog voltage, a load 3 having one end connected to an output of the analog voltage generator 7 and the other end connected to an output terminal 2, and a D/A converter 6 applying a positive output current Iout for generating a desired voltage drop at said the other end 4 of the load 3 and for applying a complementary output current Iout complementary to the positive output current Iout to said one end of the load 3. By this structure, a constant current of Iout+Iout flows at said one end 4 of the load 3, and therefore linear output can be provided.

REFERENCES:
patent: 3721975 (1973-03-01), Brinkman et al.
patent: 3789389 (1974-01-01), Lenhoff, Jr.
patent: 4124844 (1978-11-01), Black et al.
patent: 4196419 (1980-04-01), Brown
patent: 4763107 (1988-08-01), Koen et al.
Sone et al., "A 10 bit 80 MHz Subranging ADC using Redundant Structure for Error Correction," Denshi Joho Tsuushin Gakkai 1989, pp. 5-393 to 5-394.

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