Analog-to-digital sigma-delta modulator with FIR filter...

Details Analog-to-digital sigma-delta modulator with FIR filter... Analog-to-digital sigma-delta modulator with FIR filter...

2006-05-09

2006-05-09

Wamsley, Patrick (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000

Reexamination Certificate

active

07042377

ABSTRACT:
An analog-to-digital sigma-delta modulator for converting analog input signals to digital output signals comprises a feedback path (1, 101, 201) for producing analog feedback signals that are a function of the digital output signals (y, Y), an ‘N’-stage (‘N’=2) integrator path (9to14, 109to114) for integrating analog difference signals that are a difference function of the input signal and the analog feedback signals, and a quantizer (3, 103) responsive to the signals integrated by the integrator means (9to14, 109to114) for producing the digital output signals (y, Y) at clock intervals. The feedback path includes ‘N’ feedback stages (15to17, 115to117) for respective integrator stages (9to14, 109to114).Each of the ‘N’ feedback stages (15to17, 115to117) comprises finite impulse response (‘FIR’) filters (15to19, 115to117), each of the FIR filters being of the same order ‘M’, where ‘M’ is at least two; at least the filter (15, 115) of the feedback stage that feeds back to the first integrator stage is a low pass filter.The integrator stages may be discrete-time integrators; the FIR filters reduce their sensitivity to feedback voltage step changes that would cause non-linearities due to slew-rate limitations. Alternatively, the integrator stages may be continuous-time integrators; the FIR filters reduce their sensitivity to clock pulse jitters. In the embodiment shown in FIG.11,the first integrator stage (109, 110) is a continuous-time integrator stage, and the remainder of the integrator stages (11to14) are discrete-time integrator stages.

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