Analog-to-digital level error automatic calibration circuit

Details Analog-to-digital level error automatic calibration circuit Analog-to-digital level error automatic calibration circuit

2000-01-12

2001-11-20

Young, Brian (Department: 2819)

Coded data generation or conversion

Converter calibration or testing

C341S118000

Reexamination Certificate

active

06320525

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an automatic calibration circuit, and in particular to an automatic calibration circuit for eliminating an offset voltage of an operational amplifier.
2. Description of the Related Art
Usually, an offset voltage with several millivolts exists in an operational amplifier due to errors during circuit layout and manufacturing process. Basically, an operational amplifier includes a pair of differential transistors. Since it is difficult to manufacture two identical transistors, an offset voltage is caused.
When it is necessary to convert a small input voltage, such as several millivolts, up to about one hundred microvolts or several hundred microvolts into a digital signal, a differential amplifier must amplify the small input voltage in advance. For example, using an analog-to-digital converter for 9-bit conversion with a least significant bit (LSB) equal to 4 mV, when the variation of temperature to voltage of a transistor is dV/dT=−2 mV, the input voltage is required to be amplified if the resolution of temperature is only 2° C. while a sensitivity of 0.1° C. is required for the converter. In this case, the amplifier used to amplify input voltage should have a gain of 20 to meet the resolution of 0.1° C.
However, the amplifier amplifies not only the input voltage, but also its own offset voltage when used. Moreover, if the gain of the amplifier is much larger, the offset voltage is further amplified to a very large voltage value, resulting in an output distortion. For example, when the amplifier has an offset voltage of 5 mA and a gain of 10 (i.e., the input voltage can be amplified 10 times), the output voltage of the amplifier is V
o
=10(V
i
+5)=10V
i
+50, wherein V
i
represents a differential input voltage. Obviously, the offset voltage of 5 mV is amplified to 50 mV. Additionally, when the output voltage V
o
is input to an analog-to-digital converter, a conversion error on the LSB is caused to create a distortion.
For this reason, the prior converter is limited only to less than a 9-bit conversion. If it is necessary to use an analog-to-digital converter for more than a 9-bit conversion, the prior amplifier formed using a single poly gate structure fails to achieve this purpose. In other words, it is necessary to adopt a double poly gate structure or a no-overlap switch capacitor to achieve this purpose. However, these solutions increase IC manufacturing costs, complexity of circuit layout and difficulty in circuit designs.
SUMMARY OF THE INVENTION
In view of the above, an object of the invention is to provide an analog-to-digital level error automatic calibration circuit for eliminating an amplified offset voltage of an operational amplifier.
Another object of the invention is to provide an analog-to-digital level error automatic calibration circuit which can exactly implement a more than 9-bit data conversion without any distortions.
To achieve the above stated objects, an analog-to-digital level error automatic calibration circuit according to the invention includes a calibration switch circuit, an input buffer circuit, an error differential amplifying circuit, an N-bit analog-to-digital converter, a calibration register and a subtractor. The calibration switch circuit receives an external sense voltage, and transmits the sense voltage or a calibration voltage depending on whether a calibration enable signal is provided or not.
The input buffer circuit together with the error differential amplifying circuit receives and amplifies the sense voltage or the calibration voltage, thereby generating a first error amplified voltage or a second error amplified voltage. Then, the first error amplified voltage or the second error amplified error voltage is converted by the N-bit analog-to-digital converter. The second error amplified voltage generated in response to the calibration voltage is converted by the N-bit analog-to-digital converter, and then is stored in the calibration register. Thereafter, the second error amplified voltage is subtracted from the first error amplified voltage using the subtractor so as to generate a converted value without taking an offset voltage of an operational amplifier into calculation, thereby automatically eliminating the offset voltage.
As described above, the automatic calibration method can efficiently eliminate the offset voltage of the operational amplifier in coordination with a simple circuit without changing the existing manufacturing process.


REFERENCES:
patent: 4947168 (1990-08-01), Myers
patent: 5248970 (1993-09-01), Sooch et al.

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