Analog to digital interface circuit

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341133, 341119, H03M 106

Patent

active

049222511

ABSTRACT:
An analog to digital interface circuit includes two matched, symmetrical, differential amplifiers which in response to an analog signal having a rising edge and a falling edge produce first and second output signals which are identical but 180.degree. out of phase; whereby the rising edge of the analog signal corresponds to the rising edge of the first output signal, the falling edge of the analog signal corresponds to the rising edge of the second output signal and the time interval between the rising edges of the two output signals is equal to the time interval between the rising and falling edges of the analog signal. The outputs of the differential amplifiers are further processed by two matched, symmetrical buffers which produce first and second digital signals having like falling edges corresponding to the rising and falling edges of the analog signal, respectively. Control pulses generated off the like edges of the two digital signals are used as inputs to digital logic to reconstruct the analog signal or generate clock pulses.

REFERENCES:
patent: Re28633 (1975-11-01), Pastoriza
patent: 4559522 (1985-12-01), Sekino et al.
patent: 4560975 (1985-12-01), Jarva
patent: 4563670 (1986-01-01), Stallkamp et al.
patent: 4686508 (1987-08-01), van de Grift et al.

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