Analog-to-digital converting device with a constant...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S159000

Reexamination Certificate

active

06285308

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a converting device intended to convert an analog input signal into a digital output signal, having a gain defined as being equal to the ratio between the values of the output and input signals, the device comprising:
a resistor ladder arranged in series between two supply terminals, intended to generate reference voltages,
a plurality of amplifiers, each being intended to deliver an output signal that results from the amplification of a difference between the analog input signal and one of the reference voltages,
a detection stage intended to signal zero-crossings of each of the output signals of said amplifiers, and
a binary encoder intended to deliver the output signal whose value depends on said zero-crossings.
Such devices are known from the article <<An 8-bit Video ADC Incorporating Folding and Interpolation Techniques>>, by Messrs. van de Grift, Rutten and van der Veen, published in IEEE Journal of Solid-State Circuits, vol. SC-22, no. 6, December 1987. These converting devices have a transfer characteristic that describes the evolution of the value of the digital output signal as a function of that of the analog input signal, which transfer characteristic takes the form of a staircase. In an ideal converting device each step of the staircase has a center point whose abscissa corresponds to the value of one of the reference voltages, each center point being in a position to be connected to all the others by the same straight line. It is thus observed that the transfer characteristic of an ideal converting device is linear. In real converting devices, deviations relative to this linearity may occur. For modeling the behavior of the known converting devices and characterizing said deviations, one frequently uses a parameter called “differential non-linearity”, defined as being equal to the deviation relative to unity, represented by the least significant bit of the digital output signal, which is shown by the difference between the results of two successive conversions during which the analog input voltage will have taken the value of two successive reference voltages.
An ideal converting device thus has a differential non-linearity equal to zero at any point of its transfer characteristic. If in a real converting device the transfer characteristic shows at a point a non-zero differential non-linearity, said characteristic will show a missing code which is symptomatic of a conversion error.
The gain of the converting devices described above may be expressed in the form of the ratio between the maximum value of the output signal of the converter device and the value of the voltage present on the terminals of the resistor ladder. This gain may be caused to vary, depending on the operating conditions of the converting device. Indeed, it is common practice to make the maximum value of the digital output signal correspond to the maximum value the analog input signal may take, so as to fully use the range of values available for the output signal, which leads to an optimum resolution of the conversion carried out by the device.
SUMMARY OF THE INVENTION
It has been found that the differential non-linearity depends on the gain of the converting device. This implies that this parameter is bound to vary as a function of the operating conditions of the converting device, which implies that its behavior is unpredictable. Such an uncertainty is unacceptable.
It is an object of the present invention to remedy this drawback by proposing a converting device whose differential non-linearity is constant.
Studies made by the applicants have indeed enabled to demonstrate that the differential non-linearity, denoted DNL, may be expressed in the form of:
DNL=VDET.GADC/GA, where VDET is an offset voltage introduced by the detection stage, GADC is the gain of the converting device and GA is the gain of the amplifiers.
The present invention proposes a converting device as defined in the opening paragraph, characterized in that it includes adjusting means for making the gain of the amplifiers and the gain of the converting device proportional to each other.
In such a converting device, the differential non-linearity is proportional to the offset voltage VDET introduced by the detection stage. As this offset voltage is fixed and intrinsic of the structure of the detection stage, the differential non-linearity is constant and the behavior of the converting device is predictable, whatever its operating conditions. Moreover, by optimizing the design of the detection stage, it is possible to minimize the value of this offset voltage. In the converting device according to the invention, this minimization is reflected in the value of the differential non-linearity, which reduces to a minimum the risk for conversion errors to occur.
In a particular embodiment of the invention, a converting device as described above is characterized in that:
the adjusting means comprise a first current source arranged in series with the resistor ladder and intended to produce a current whose value is proportional to the value of a control signal, and in that
each amplifier has an adjusting input intended to receive the control signal, while the gain of each amplifier is proportional to the value of the signal received on its adjusting input.
This embodiment is advantageous in that it enables to easily modify the gain of the converting device and simultaneously adjust the gain of the amplifiers, so that these gains remain proportional to each other. The amplifiers may be realized in various forms, such as, for example, in the form of Gilbert cells, each intended to multiply the difference between the input signal and one of the reference voltages by the control signal.
An embodiment which is particularly advantageous in its simplicity presents a converting device as described above, characterized in that the amplifiers are formed by differential pairs, all biased by means of mutually identical current sources, each being intended to produce a current whose value is proportional to the value of the control signal.
In this embodiment, the control signal influences elements of the same kind; in this case the current sources. The control signal may thus be used inside the amplifiers, without being subjected to a particular transformation. In contrast, using Gilbert cells for building amplifiers, or, more generally, using voltage multipliers will require a conversion of the control signal into an analog voltage.
In a preferred embodiment of the invention, a converting device as described above is characterized in that the adjusting means further include a comparator intended to carry out a comparison between the value of the output signal and a predetermined value when the input signal takes a value called calibration value, and to produce the control signal whose value depends on the result of said comparison.
This structure of the adjusting means enables to easily adjust the maximum digital value of the output signal to the maximum value of the analog input signal, represented by the calibration signal, and thus enables to obtain an optimum resolution for the conversion performed by the device whose behavior remains predictable thanks to the invention.


REFERENCES:
patent: 4831379 (1989-05-01), Plassche
patent: 5835047 (1998-11-01), Vorenkamp et al.
patent: 5856800 (1999-01-01), Pailleur et al.
“An 8-Bit Video ADC Incorporating Folding and Interpolation Techniques”, By Rob van de Grift et al., IEEE Journal of Solid-State Circuits, vol. SC22, No. 6, Dec. 1987, pp. 944-953.

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