Analog-to-digital converter with reduced metastable errors

Details Analog-to-digital converter with reduced metastable errors Analog-to-digital converter with reduced metastable errors

2007-04-30

2009-02-17

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

07492302

ABSTRACT:
In an analog-to-digital converter, an analog-to-digital conversion stage comprising a comparator and an analog residual signal generator. The comparator is operable to compare an analog input signal or a sample of the analog input signal with a threshold to generate a bit signal. The analog residual signal generator is operable to generate an analog residual signal from signals comprising the sample of the analog input signal and the bit signal such that, at a level of the analog input signal equal to the threshold of the comparator, the analog residual signal has a level independent of the state of the bit signal. The analog residual signal generator comprises a summing element, a selective inverter and an amplifier in series. The summing element is operable to sum a signal input to it with a reference signal. The selective inverter precedes the summing element, and is operable in response to a first state of the bit signal to pass a signal input to it, and is operable in response to a second state of the bit signal to invert the signal input to it.

REFERENCES:
patent: 5327131 (1994-07-01), Ueno et al.
patent: 6501412 (2002-12-01), Tanabe
patent: 6867723 (2005-03-01), Tachibana et al.

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