Analog-to-digital converter with level converter and level...

Details Analog-to-digital converter with level converter and level... Analog-to-digital converter with level converter and level...

1998-12-28

2001-02-27

Wamsley, Patrick (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S120000

Reexamination Certificate

active

06195031

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to an analog-to-digital converter circuit for digitization of a high-frequency signal in the megahertz range with large dynamics.
2. Description of the Prior Art
U.S. Pat. No. 5,546,081 discloses an analog-to-digital converter circuit for digitizing an amplitude-modulated analog high-frequency signal. For example, the analog-to-digital converter can be utilized in the high-frequency receiver of a diagnostic magnetic resonance apparatus. The analog-to-digital converter circuit has a controllable amplifier that precedes the actual analog-to-digital converter. The output of the analog-to-digital converter is connected to a divider that in turn reduces the digitized signal according to the preceding amplification. Control signals for the amplifier and the divider are determined by a level recognition element. The gain is set on the basis of the recognized level so that the analog-to-digital converter operates with maximum modulation. A disadvantage of this known circuit is that it can satisfy high demands on the linearity of the analog-to-digital conversion only if the amplifier has a constant gain factor that can be exactly set, and a correspondingly linear analog-to-digital converters must be employed. It is thereby a serious problem to operate this circuit for converting signals which require that the modification of the gain ensue rapidly within a sampling time interval.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an analog-to-digital converter circuit for the digitization of a high-frequency signal with large dynamics that can meet a high demand for linearity in the analog-to-digital conversion even without high precision components.
This object is achieved in an analog-to-digital converter circuit according to the invention having a first analog-to-digital converter and a second analog-to-digital converter connected in parallel, a level converter connected to one of the analog-to-digital converters, a level recognition element for determining a level range in which the high-frequency signal lies and for generating a control signal dependent on the level range, and a correction memory that is connected to the level recognition element and whose address inputs are connected to outputs of the analog-to-digital converters. The control signal is used as a selection criterion for selecting analog-to-digital converter address data are taken from for producing a digital output signal. This digital output signal is linearized according to a characteristic of the selected analog-to-digital converter. By employing a correction memory addressable by the analog-to-digital converters, the individual characteristics of the two analog-to-digital converters are combined to form overall linear characteristics for the analog-to-digital converter circuit as the input signal caries between low and high amplitudes. A high precision is thereby possible because deviations from the rated characteristic of the individual analog-to-digital converters can likewise be compensated.
In an embodiment the characteristic is additionally fashioned for the compensation of unwanted distortions that are added to the high-frequency signal by the upstream components. The correction values can be determined in an adjustment step.
In another embodiment an amplifier is utilized as the level converter and that the level recognition element is arranged behind the amplifier. A full modulation of the amplifier thus can be identified without noticeable time delay. An activation of the analog-to-digital converter with larger quantization steps ensues with the control signal emitted by the level recognition element.
In order to compensate for different transit times which may exist in the two analog signal paths, a signal delay element precedes one of the analog-to-digital converters according in another embodiment.
Analog-to-digital converters often have an internal processing time that elapses between the application of an analog input signal and the appearance of the appertaining digital output signal. In certain converter types, this even lasts a number of clock cycles. In order to assure correct allocation of the data, a digital delay element can be inserted following the comparator output.


REFERENCES:
patent: 5500644 (1996-03-01), Denjean et al.
patent: 5546081 (1996-08-01), Baumgartl
patent: 5600317 (1997-02-01), Knoth et al.
patent: 5777568 (1998-07-01), Inoue
patent: 5777569 (1998-07-01), Naruki et al.
patent: 6057891 (2000-05-01), Guerin et al.
patent: 6127955 (2000-10-01), Handel et al.

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