Analog-to-digital converter with interchangeable resolution...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S155000

Reexamination Certificate

active

11358289

ABSTRACT:
A successive approximation register analog-to-digital converter (SAR ADC) having a sample, hold and convert amplifier circuit may be configured for either a single channel SAR ADC or a multiple channel SAR ADC. Switches or metal connection options, e.g., bit configurable or metal mask configurable, respectively, may be used to configure a common capacitor area, a portion of which may be used as a reconfigurable charge-redistribution digital-to-analog converter (CDAC) of the SAR ADC as either a single channel sample, hold and convert 12-bit capacitor configuration or a four channel sample, hold and convert 10-bit capacitor configuration. All other parts of the SAR ADC circuitry may be substantially the same for either configuration, e.g., the resistive digital-to-analog converter (RDAC), successive approximation register (SAR), ADC controller, sample, hold and convert switches, comparator, etc, may be substantially the same for either the single or multiple channel SAR ADC configurations.

REFERENCES:
patent: 5675340 (1997-10-01), Hester et al.
patent: 5892473 (1999-04-01), Shin
patent: 6486806 (2002-11-01), Munoz et al.
patent: 2003/0063026 (2003-04-01), Nandy
PCT International Search Report, PCT/US2006/006365, 14 pages, mailing date May 24, 2006.
IEEE Transactions on Circuits and Systems, -vol. 36, No. 8, New York, 4 pages, Aug. 1989.
G.T. Davis, Dual Successive Approximation Register in Multi-channel Analog-to-Digital Interface, IBM Technical Disclosure Bulletin, vol. 27, No. 9, 5303-5305, Feb. 1985.

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