Analog-to-digital converter with delay correction

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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Details

341118, H03M 136, H03M 106

Patent

active

051894220

ABSTRACT:
Analog-to-digital converter operating in parallel having an analog signal input and a number of digital signal outputs, comprising a plurality of comparators having each two inputs and one output, one input being connected to an impedance network for supplying this one input with its own predetermined reference voltage, and the second input being connected to the analog signal input for receiving an analog input signal to be converted, so that each of the comparators processes a predetermined input signal portion. The comparator outputs are coupled to corresponding digital signal outputs, while delay elements are inserted between the comparator outputs and the corresponding digital signal outputs for causing a delay to occur related to the steepness of the slope of the input signal portion of the relevant comparator.

REFERENCES:
patent: 2876418 (1959-03-01), Villars
patent: 3050713 (1962-08-01), Harmon
patent: 4393368 (1983-07-01), Rasmussen
patent: 4897656 (1990-01-01), van de Plassche et al.
patent: 4908621 (1990-03-01), Polonio et al.

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