Analog-to-digital converter with a continuously calibrated volta

Coded data generation or conversion – Converter calibration or testing

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341121, 341143, 341155, H03M 110

Patent

active

053193709

ABSTRACT:
A method and apparatus for calibration of errors in the analog reference voltage input of an analog-to-digital converter. A monolithic reference voltage generator is provided to generate the analog reference which includes a bandgap voltage reference (50) that outputs an untrimmed voltage and a temperature voltage. The untrimmed voltage and temperature voltage are input to a delta-sigma A/D converter (52) which has the output thereof processed through a digital filter (54) to output data on a data bus (58) for storage in an EEPROM (60). The EEPROM (60) is operable in one mode to store temperature history data and, in another mode, to store temperature compensation data. In one mode, temperature compensation parameters are retrieved from the EEPROM (60) and utilized by a multiplier/accumulator circuit (74) to generate compensation factors which are output as a digital word to a DAC (76) for controlling a trim circuit (14). The trim circuit (14) provides a temperature compensation for the output of the bandgap voltage reference (50). The system is operable in a calibration mode to measure temperatures during a burn-in procedure and calculate necessary information to determine compensation factors and store these in the EEPROM (60). This temperature data is extracted from the EEPROM (60) and output to a serial I/O port (64), compensation factors determined and then stored back in the EEPROM (60). The delta-sigma A/D converter (52) in the run mode then makes temperature measurements for use by the multiplier/accumulator circuit (74) in determining the appropriate compensation data to extract from the EEPROM (60) to trim the output of the bandgap voltage reference circuit (50).

REFERENCES:
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patent: 4943807 (1990-07-01), Early et al.
Bang-Sup Song & Paul R. Gray, "A Precision Curvature-Compensated CMOS Bandgap Reference", IEEE J. Solid State Circuits, vol. SC-18, No. 6, Dec. 1983.
C. R. Palmer & R. C. Dobkin, "A Curvature-Corrected Micropower Voltage Reference", ISSCC Digest, Feb. 1981.
P. Holloway, "A Trimless 16b Digital Potentiometer", ISSCC Digest, Feb. 1984, pp. 66-67, 320-321.
G. McGlinchy, "A Monolithic 12b 3uS ADC", ISSCC Digest, Feb. 1983, pp. 80-81.
H. Lee, D. A. Hodges & P. R. Gray, "A Self-Calibrating 12b 12uS CMOS", ISSCC Digest, Feb. 1984, pp. 64-65.
B. Harvey, "A Monolithic 12b System DAC", ISSCC Digest, Feb. 1983, pp. 182-183, 306.
B. M. J. Kup, E. C. Dijkmans, H. Naus and J. Sneep, "A Bit Stream Digital-to-Analog Converter with 18b Resolution", ISSC Digest, Feb. 1991, pp. 70-71, 293.

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