Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1988-02-08
1989-10-03
Shoop, Jr., William M.
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
341136, 357 237, H03M 118
Patent
active
048720100
ABSTRACT:
An analog-to-digital converter 10 employs a series of comparators 12, 14, 16 and 18. Each comparator includes at least one inverter consisting of a CMOS transistor pair including a P-channel transistor 22 and N-channel transistor 24. The threshold levels of the transistors 22, 24 are modified using focused ion beam implantation techniques to provide the comparators with monotonically increasing transistion levels.
REFERENCES:
patent: 4212684 (1980-07-01), Brower
patent: 4420743 (1983-12-01), Upadhyayula
Solid State Devices, Proceedings of the 6th Conf. on Solid State Devices, Tokyo, 1974, Supplement to the Journal of the Japan Society of Applied Physics, vol. 44, 1975, T. Yamaguchi et al.: "Investigations of Continuously Variable Threshold Voltage Devices (CVTD)", pp. 233-242, see abstr.; p. 235, col. 2, line 34-p. 236, col. 1, line 2; p. 239, col. 2, line 26-p. 240, col. 2, line 11; FIG. 8a.
IEEE Trans. on Elect. Devices, vol. ED-22, No. 5, May 1975, T. Yamaguchi, pp. 295-297.
Electronic Design, vol. 36, No. 16, Jul. 14, 1988 (Hasbrouck Heights, N.J., US), p. 34.
Jensen Joseph F.
Larson Lawrence E.
Schmitz Adele E.
Walden Robert H.
Denson-Low Wanda K.
Hughes Aircraft Company
Romano Gary J.
Shoop Jr. William M.
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