Analog-to-digital converter having parametric configurablity

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C341S143000, C341S172000

Reexamination Certificate

active

07002501

ABSTRACT:
A reconfigurable ADC includes a plurality of reconfigurable blocks for allowing the ADC to provide a plurality of architectures. In one embodiment, the ADC can be configured to operate in a pipeline mode and a sigma-delta mode. This arrangement provides an ADC having a relatively large range of bandwidth and resolution.

REFERENCES:
patent: 5677691 (1997-10-01), Hosticka et al.
patent: 5691720 (1997-11-01), Wang et al.
patent: 5877720 (1999-03-01), Setty et al.
patent: 5936562 (1999-08-01), Brooks et al.
patent: 5982313 (1999-11-01), Brooks et al.
patent: 6005506 (1999-12-01), Bazarjani et al.
patent: 6268820 (2001-07-01), Sherry et al.
patent: 6288664 (2001-09-01), Swanson
patent: 6396429 (2002-05-01), Singer et al.
patent: 6686860 (2004-02-01), Gulati et al.
patent: 6741194 (2004-05-01), Cassagnes et al.
patent: 6762707 (2004-07-01), Wolf et al.
patent: 2004/0145508 (2004-07-01), Gulati et al.
Stephen H. Lewis et al., “a Pipelined 5-M Sample/s 9-bit Analog-to-Digital Converter”, IEEE Journal of Solid-State Circuits, vol. SC-22, No. 6, Dec. 1987, pp. 954-961.
Bernard Ginetti et al., “A CMOS 13-b Cyclic RSD A/D Converter”, IEEE, Journal of Solid-State Circuits, vol. 27. No. 7, Jul. 1992; pp. 957-965.
Stephen A. Jantzi et al.; “A Fourth-Order Bandpass Sigma-Delta Modulator”, IEEE Journal Of Solid-State Circuits, vol. 28, No. 3, March 1993; pp. 282-291.
“2.7 V to 5.5 V, High-Speed Low-Power Re-Configurable Analog-To-Digital Converter With 4-Input. Dual, Sample/Hold, Parallel Interface And Power Down”, Texas Instrument, Inc.; SLAS162; Apr., 1998, pp. 1-23.
P. Setty. et al.; “FA 9.6: A. 5.75b 350Msample/s Reconfigurable Flash ADC for a PRML Road Channel”, ISSCC98; Feb. 6, 1998 pp. 1-3.
Harlan Ohara et al.; A“CMOS Programmable Self-Calibrating 13-bit Eight Channel Data Acquisition Peripheral”, IEEE 1987: pp. 930-938.
Geiger et al.; “VLSI Design Techniques for Analog and Digital Circuits; Analog Systems”: 1990; pp. 642-649.
Stacy Ho: “Design of a Iobit IOMs/s Pipeline A/D Converter”; Thesis; 1992; pp. 11-20.
Johns & Martin; “Analog Integrated Circuit Design”; 1996; pp. 506-517, 522-527.
Max W. Hauser; “Principles of Oversampling A/D Conversion”; J. Audio Eng. Soc., vol. 39, No. 12, 1991; Jan./Feb.; pp. 3-14, 16-17. 19, 22-26.
Cheong Kun, A Low-Energy Resolution-Reconfigurable A/D Converter with a new Pipelined/Cyclic SAR Architecture, May 2004, pp. 1-8.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Analog-to-digital converter having parametric configurablity does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Analog-to-digital converter having parametric configurablity, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Analog-to-digital converter having parametric configurablity will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3691134

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.