Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
1998-07-29
2001-01-23
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S163000
Reexamination Certificate
active
06177899
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to circuits and methods for detection of the magnitude of input analog voltage signals and the conversion of the detected magnitude to a digital code. More particularly, this invention relates to multiple stage analog-to-digital converters where a first conversion determines a coarse range of the input analog voltage signal and subsequent conversions resolve the determination of input analog voltage signal to finer increments.
2. Description of Related Art
Analog-to-digital (A/D) converters are well known in the art for the conversion of continuously variable electronic signals to digital codes representing the magnitude of the electronic signals. Two types of A/D converters include the Successive Approximation type A/D converter and the FLASH type A/D converter. The Successive Approximation type A/D converter functions by creating a trial digital code and converting the trial digital code to a trial analog signal, the trial analog signal is compared to the input signal and an error signal is generated. A new digital code is created. The digital new code is converted to a new trial analog signal. The new trial analog signal is compared to the input signal and a new error signal is created. Then a new digital code is created. This process is successively repeated until the error signal approaches a zero level and the correct digital code has been generated to represent the input signal.
The FLASH A/D converter, as shown in
FIG. 1
, has a sample and hold circuit
10
to capture and retain the analog input signal VIN
5
. The sampled and held analog input signal
45
is the input to multiple voltage comparators
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
. The number of voltage comparators
30
a
,
30
b
,
30
n
-
1
,
30
n
is determined as:
N
c
=2
n
where:
Nc is the number of voltage comparators
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
, and
N is the number of binary digits of the digital code D0, D1, . . . , DN−2, DN−1,
40
.
Further, each voltage comparator has a voltage reference
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
. The voltage references
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
are generated in the voltage reference generator
15
. The voltage reference generator
15
is classically a resistive voltage divider connected between the top reference voltage VRT
20
and the bottom reference voltage VRB
25
. Each of the voltage references
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
are spaced incrementally between the top reference voltage VRT
20
and the bottom reference voltage VRB
25
.
The outputs
32
a
,
32
b
, . . . ,
32
n
-
1
,
32
n
of the voltage comparators
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
form a thermometer code. The thermometer code has a first logic level such as a “1” for those comparators
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
where the voltage references
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
are less than the amplitude of the sampled and held analog input signal
45
and a second logic level such as a “0” for those comparators where the voltage references
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
are greater than the sampled and held analog input signal
45
.
The outputs
32
a
,
32
b
,
32
n
-
1
,
32
n
of the comparators
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
are the inputs to the encoder
35
. The encoder
35
creates the digital code D0, D1, . . . , Dn−1, Dn
40
.
The structure of the FLASH A/D converter becomes very large and cumbersome as the number of binary digits of the digital code D0, D1, . . . , Dn−1, Dn
40
increases. For instance, if the digital code D0, D1, . . . , Dn−1, Dn
40
had eight binary digits, then there would be 2 or 256 comparator
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
and 256 voltage references
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
from the reference generator
15
. However, if the digital code D0, D1, . . . , Dn−2, Dn−1 40 has twelve binary digits, there are 2
12
or 4096 comparators
30
a
,
30
b
, . . . ,
30
n
-
1
,
30
n
and 4096 voltage references
17
a
,
17
b
, . . . ,
17
n
-
1
,
17
n
from the voltage reference generator
15
. Thus, an increase in precision of the conversion, cause a significantly more complex designs.
To alleviate this complexity, multiple stage A/D converters have been disclosed in U.S. Pat. No. 4,903,028 (Fukushima), U.S. Patent 5,291,198 (Dingwall et al.), and U.S. Pat. No. 5,726,653 (Hsu et al.), and are shown in FIG.
2
. The analog input signal VIN
105
is the input to the sample and hold circuit
110
. The sample and hold circuit
110
periodically samples and retains the analog VIN
105
to create the sampled and held analog input signal
140
.
The sampled and held analog input signal
140
is the input to a set of coarse voltage comparators
160
. The coarse voltage comparators
150
compare the sampled and held analog input signal
140
to a set of coarse reference voltages
125
. The results of the comparison of the sampled and held analog input signal
140
and the set of coarse reference voltages
125
is a set of coarse thermometer codes
160
indicating the amplitude of the sampled and held analog input signal
140
relative to the each of the set of coarse reference voltages.
The set of coarse thermometer codes
160
has the first logic level (1) at those comparators of the set of coarse comparators
150
that have a coarse reference voltage from the set of coarse reference voltages
125
that is less than the amplitude of the sampled and held analog input signal
140
, and have the second logic level (0) for those comparators of the set of coarse comparators
150
that have a coarse reference voltage from the set of coarse reference voltages
125
that is greater than the amplitude of the sampled and held analog input signal
140
.
The coarse reference voltages
125
are generated by the voltage reference generator
115
. The voltage reference generator is connected between the top reference voltage source VRT
120
and the bottom reference voltage source VRB
115
. Each coarse reference voltage of the set of coarse reference voltages
125
is distributed incrementally between the top reference voltage source VRT
120
and the bottom reference voltage source
125
. The coarse voltage increment between each coarse reference voltage is determined as:
Δ
V
MSB
=
VRT
-
VRB
2
n
MSB
where:
&Dgr;V
MSB
is the increment between each coarse reference voltage,
n
MSB
is the number of Most Significant Bits (MSB) of the digital code D0, D1, . . . , Dn−2, Dn−1
175
.
A sub-set of fine reference voltages are placed between each of the coarse reference voltages. The fine voltage increment between each fine reference voltage is:
Δ
V
LSB
=
Δ
V
MSB
2
n
LSB
where:
&Dgr;V
LSB
is the increment between each coarse reference voltage,
n
LSB
is the number of Most Significant Bits (MSB) of the digital code D0, D1, . . . , Dn−2, Dn−1
175
.
All of the subsets of the fine reference voltages
130
are transferred to the steering/select logic
135
. The steering/select logic
135
decodes the coarse thermometer code
160
to determine the two coarse voltage references that the sampled and held analog input voltage
140
lies between. That subset of the fine reference voltages between two coarse voltage references forms the one set of fine reference voltages connected to the fine comparators
155
.
The sampled and held analog input signal
140
is connected to the fine comparators and is compared to each of the fine reference voltages of the set of fine reference voltages
145
. The results of comparison of sampled and held analog input signal
140
with each of the fine reference voltages
145
are the set of fine thermometer codes
165
.
The set of fine thermometer codes
165
has a first logic level (1) at those comparators of the set of fine comparators
155
that have a fine reference voltage of the set of fine reference voltages
145
that is less
Ackerman Stephen B.
Etrend Electronics, Inc.
Knowles Billy
Saile George O.
Williams Howard L.
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