Analog-to-digital converter having cyclic configuration

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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Details

C341S156000

Reexamination Certificate

active

07088277

ABSTRACT:
A cyclic AD converter having a conversion processing speed or conversion accuracy designed no higher than necessary. In the AD converter, an input analog signal is held by a sample-and-hold circuit, and converted into a digital value by an AD conversion circuit. A DA conversion circuit converts the digital value output from the AD conversion circuit into an analog value. A subtractor circuit outputs the difference between the analog value output from the AD conversion circuit and the analog value held in the sample-and-hold circuit. An amplifier circuit amplifies the output of the subtractor circuit, and feeds back the resultant to the sample-and-hold circuit and the AD conversion circuit. In the course of this feedback-based cyclic processing, an amplification control circuit changes the gain of the amplifier circuit in accordance with the progress of the circulation.

REFERENCES:
patent: 5974089 (1999-10-01), Tripathi et al.
patent: 6351506 (2002-02-01), Lewicki
patent: 6496128 (2002-12-01), Wiesbauer et al.
patent: 6590513 (2003-07-01), Stetson et al.
patent: 6741194 (2004-05-01), Cassagnes et al.
patent: 6778126 (2004-08-01), Ali
patent: 4-026229 (1992-01-01), None
patent: 11-145830 (1999-05-01), None

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