Analog-to-digital converter having amplifier and comparator stag

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341162, H03M 142

Patent

active

058618325

ABSTRACT:
The first amplifier stage in the A/D converter receives an analog input signal and generates an analog residue signal and a digital output signal. Any other amplifier stage in the A/D converter receives the analog residue signal and the digital output signal from the previous amplifier stage, and generates another analog residue signal and another digital output signal. The comparator stage receives the analog residue signal and the digital output signal from the last amplifier stage, and generates one or more additional digital output signals. The digital output signals from all of the stages are used to generate the digitized equivalent of the original analog input signal. Because the comparator stage can be designed without an amplifier, the total number of amplifiers required to implement the A/D converter is reduced, as compared to prior art techniques.

REFERENCES:
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patent: 5212486 (1993-05-01), Nagaraj
patent: 5274377 (1993-12-01), Matsuura et al.
patent: 5283583 (1994-02-01), Ichihara
patent: 5541602 (1996-07-01), Opris et al.
patent: 5710563 (1998-01-01), Vu et al.
"Efficient Circuit Configurations for Algorithmic Analog to Digital Converters", by Krishnaswami Nagaraj, IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 40, No. 12, Dec. 1993, pp. 777-785.
"A 10-b 20-Msample / s Analog-to-Digital Converter", by Stephen H. Lewis et al., IEEE Journal of Solid-State Circuits, vol. 27. No. 3 Mar. 1992, pp. 351-358.
All -MOS Charge Redistribution Analog-to-Digital Conversion Techniques-Part 1, James L. McCreary and Paul R. Gray, IEEE Journal of Solid-State Circuits, vol. SC-10, No. 6, Dec. 1975, pp. 371-379.

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