Coded data generation or conversion – Sample and hold
Patent
1991-04-09
1992-09-15
Pellinen, A. D.
Coded data generation or conversion
Sample and hold
307352, H03M 120
Patent
active
051481626
ABSTRACT:
An analog-to-digital converter comparator circuit includes a pair of differential amplifiers having their outputs normally intercoupled in a subtractive sense. At a sampling strobe time, the output of one differential amplifier is reversed such that outputs of the two differential amplifiers are additive. The period of time during which the output signals add can be made as short as desired, for example by successively operating differential coupling circuits at the amplifier outputs through an intervening delay line. A very small aperture time is secured which is substantially shorter than the time constant of subsequent circuitry. A latch circuit receives the output of the comparator for assuming one of two different states in accordance with the comparator sampled output.
REFERENCES:
patent: 4229729 (1980-10-01), Devendorf et al.
patent: 4764752 (1988-08-01), Ormond
Dellett John P.
Gray Francis I.
Pellinen A. D.
Tektronix Inc.
Young B. K.
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