Analog to digital converter circuit of successive...

Coded data generation or conversion – Converter calibration or testing

Reexamination Certificate

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C341S172000

Reexamination Certificate

active

07015841

ABSTRACT:
In a sampling and holding, a control logic circuit connects another end of each capacitor of a DA converter to a ground potential, and outputs a sampled input analog signal from a switched amplifier to one end of a hold capacitor to hold. In a successive approximation, it controls a switched amplifier to set an output terminal thereof to a high-impedance state and the hold capacitor to connect the one end thereof to the ground potential. Then, it switches over connection of another end of each capacitor from the ground potential to a power supply voltage based on a digital value held by a successive approximation register to output an output voltage from another end of the hold capacitor to a comparator, and compares the output voltage from another end thereof with an intermediate reference voltage to obtain a digital value from the successive approximation register.

REFERENCES:
patent: 5606320 (1997-02-01), Kleks
patent: 6486806 (2002-11-01), Munoz et al.
patent: 6603415 (2003-08-01), Somayajula
patent: 6750800 (2004-06-01), Yoshinaga
patent: 6850181 (2005-02-01), Tsinker
Jens Sauerbrey et al., A 0.5V, 1 μW Successive Approximation ADC, Proceedings of 28thEuropean Solid-State Circuit Conference (ESSCIRC 2002), Sep. 2002, pp. 247-250, Firenze, Italy.
Akira Matsuzawa, Explicative Paper, “CMOS Operational Amplifier,” The IEICE Transaction on Electronics (C), The Institute of the Electronics, Information and Communications Engineers (IEICE) in Japan, May 2001, pp. 357-373, vol. J84-C, No. 5 (with partial English translation).

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