Analog-to-digital converter circuit

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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H03M 136

Patent

active

060724161

ABSTRACT:
An analog-to-digital converter circuit, such as a flash-type A/D converter, has a plurality of voltage comparators. Each voltage comparator has first and second input terminals and an output terminal. The voltage comparators are arranged in order of reference voltages V.sub.ref1, V.sub.ref2, V.sub.ref3, V.sub.ref4, and V.sub.ref5 supplied to the respective second input terminals of the voltage comparators. Each voltage comparator is connected to the adjacent voltage comparator and the adjacent voltage comparator but one via a first resistor and a second resistor, respectively. The presence of the second resistors makes it possible to improve the degree of contributions of the voltage comparators positioned farther away from the center comparator. Accordingly, conversion deviations are reduced when the outputs of the respective comparators are added and averaged, thereby enhancing conversion precision. As a consequence, the voltage comparators are improved in comparison precision and comparison speed.

REFERENCES:
patent: 5841389 (1998-11-01), Kinugasa et al.
patent: 5877720 (1999-03-01), Setty et al.
Kattmann et al., "A Techinque For Reducing Differential Non-Linearity Errors In Flass A/D Converters", IEEE International Solid-State Circuits Conference, pp. 170, 171, (1991).
Bult et al., "A 170mW 10b 50M Sample/s CMOS ADC in 1mm.sup.2 ", IEEE International Solid-State Circuits Conference, pp. 136-137, 1997).
C. Mead, "Analog JLSI And Neural Systems", Addison--Wesley Publishing Company, Massachusetts, p. 106, (1989).

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