Analog-to-digital converter circuit

Coded data generation or conversion – Analog to or from digital conversion – Nonlinear

Reexamination Certificate

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Details

C341S155000

Reexamination Certificate

active

06285305

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to an analog-to-digital converter circuit.
2. Description of the Prior Art
U.S. Pat. No. 5,546,081 and the corresponding German OS 43 19 256 disclose an analog-to-digital converter circuit for purposes of digitalizing an amplitude-modulated analog high-frequency signal. The analog-to-digital converter circuit is composed of an analog-to-digital converter with a controllable amplifier that is connected upstream and with a digital divider that is connected downstream. The amplification of the controllable amplifier and the division of the divider compensate each other. The control signals for the amplifier and for the divider are determined by means of a level recognition element and are prescribed with respect to the amplifier and the divider.
This known analog-to-digital converter circuit has the disadvantage of making high demands regarding the linearity of the digitalization. These demands can be only fulfilled when the amplifier has constant amplification factors that can be precisely adjusted and when the analog-to-digital converter in the circuit is highly linear. Another significant problem is that the amplification must be adjusted extremely fast given changes of the amplification.
German Translation 690 11 998 (of European Patent 0 406 080) discloses an analog-to-digital converter circuit with two signal paths that are switched in parallel with one another, with a common input signal being supplied to these paths. A sample and hold circuit is arranged in each of the signal paths; the output signals of these sample and hold circuits, in alternation being supplied to an analog-to-digital converter via a switching unit. An amplifier with an adjustable amplification factor (gain) is arranged upstream relative to one of the sample and hold circuits.
European Application 0 911 976 (not published before the convention priority data of the present application) describes an analog-to-digital converter circuit with a sample and hold circuit, with an amplifier with an adjustable amplification connected downstream, and an analog-to-digital converter arranged downstream from this amplifier.
U.S. Pat. No. 5,422,643 discloses an analog-to-digital converter circuit with a number of signal paths that are switched in parallel with one another. In each of in these said signal paths, a common input signal is subjected to respective fixed amplifications that are different from one another. A selection circuit through-connects only one of the signal paths to an analog-to-digital converter that is connected downstream relative to the selection circuit, dependent only the respective signal levels (amplitudes) in the signal paths.
U.S. Pat. No. 4,739,307 discloses an analog-to-digital converter circuit having an amplifier with an adjustable amplification (gain), with a sample and hold circuit arranged downstream relative to the amplifier, and a selection circuit and an analog-to-digital converter arranged downstream relative to the sample and hold circuit.
U.S. Pat. No. 5,844,512 discloses an analog-to-digital converter circuit, wherein an analog input signal is supplied to an amplifier with an adjustable amplification. The output signal of the amplifier is supplied to an analog-to-digital converter, which is arranged downstream, via a sample and hold circuit.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an analog-to-digital converter circuit that does not require high precision components and yet provides a high linearity in a large dynamic range from input signal to output signal.
This object is achieved by means of an analog-to-digital converter circuit having a pre-sample and hold circuit for acquiring and temporarily storing (holding) a supplied analog input signal and for subsequently emitting the temporarily stored input signal as an output, at least two signal paths, which are downstream relative to the pre-sample and hold circuit and which are switched in parallel with one another, with output from the pre-sample and hold circuit being subjected to respectively different fixed amplification, in these signal paths, and a selection circuit arranged downstream relative to the signal paths for through-switching only one of the signal paths, dependent on the signal level, to an analog-to-digital converter that is arranged downstream relative to the selection circuit.
The structure of the analog-to-digital converter circuit is particularly simple when the amplification equals one in one of the signal paths. The amplification can be alternatively greater than one or less than one in the other one of the signal paths.
The amplification can be realized in a particularly simple way with purely passive components (such as a resistance divider circuit) when the amplification is less than one. As warranted, it can be necessary to undertake a pre-amplification of the analog input signal before or after the pre-sample and hold circuit.
The analog-to-digital converter circuit can process data at a higher rate in an embodiment wherein when a post-sample and hold circuit is arranged between the selection circuit and the analog-to-digital converter. The two sample and hold circuits can be identically fashioned.
Compensation of linearity distortions or errors is in an embodiment wherein a correction circuit is arranged downstream relative to the analog-to-digital converter for correcting linearity distortions.
The range of values of the digitalized signal can be adjusted together with the linearity correction when the selection circuit is connected to the correction circuit. A delay element preferably is arranged between the selection circuit and the correction circuit for compensating for the conversion time associated with the analog-to-digital conversion.
The inventive analog-to-digital converter circuit can be utilized in a reception device of a magnetic resonance device, in particular.


REFERENCES:
patent: 4739307 (1988-04-01), Marcovici et al.
patent: 4851842 (1989-07-01), Iwamatsu
patent: 5093660 (1992-03-01), Beauducel
patent: 5422643 (1995-06-01), Chu et al.
patent: 5546081 (1996-08-01), Baumgartl
patent: 5760727 (1998-06-01), Lin
patent: 5844512 (1998-12-01), Gorin et al.
patent: 6094153 (2000-07-01), Rumsey et al.
patent: 0 911 976 (1998-09-01), None
patent: 2 040 125 (1980-08-01), None

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