Analog-to-digital converter and sensor device comprising such a

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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Details

341118, H03M 112

Patent

active

058445145

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to an analog-to-digital converter and a sensor device including such a converter.
2. Description of Related Art
Digital technology dominates the field of signal processing in an increasing number of applications. However, the input signals involved are not always of digital origin, but may consist of analogue quantities which are sensed with the aid of sensors. In most cases, the sensors convert the measured signal to a current or a voltage. In the following, we will assume that we are dealing with a voltage, but the line of argument and the ideas put forth below may sometimes also be applied to a current, a charge or some other quantity. As the digital technology enables higher and higher calculation capacities, the interface between analogue and digital signal processing is moved closer and closer to the sensor, resulting in increased digital filtration instead of analogue filtration. Mostly, this means that higher requirements are placed on the bandwidth as well as on the resolution in the analog-to-digital conversion. Radio and radar are examples of this.
Imaging sensors are another example involving a large amount of data (HDTV), where it is a desideratum that the A/D conversion takes place close to the sensor. The resolution (dynamic range) and the bandwidth vary considerably according to the application. In uncooled infrared cameras, the requirements placed on the resolution are extremely high, fully on a par with those placed on audio products. At the same time, the bandwidth is in the video frequency range. However, it is very difficult to achieve A/D conversion involving high requirements on bandwidth and resolution, especially if one wishes to avoid expensive trimming of the converter.
A/D converters (ADC) providing a resolution that exceeds about 10 bits can be divided into two groups: pulse-modulating ADCs with built-in linearity and conventional ADCs in the need of expensive trimming.
In the group of conventional ADCs, there are many variants, such as flash, successive approximation (SA), algorithmic, single ramp, and so forth. What these variants all have in common is that the accuracy of the quantisation intervals is determined by the accuracy in the relationships between the components. Double-ramp variants are the exception, measuring time in order to integrate up to a certain level. However, double-ramp variants are unacceptably slow at a high resolution. The accuracy of a conventional ADC is often restricted by capacitance, transistor or resistance matching. The relative component matching in a chip with standard VLSI technology often results in an accuracy of approximately 8-10 bits. Enhanced precision requires additional trimming of the components afterwards, which costs extra. Part of the extra cost is due to the fact that use has to be made of process technology enabling trimming. As a result, conventional high-resolution ADCs become expensive. In addition, the accuracy is reduced as time goes on as a result of the ageing of the component parts.
In the group of pulse-modulating ADCs, there are different variants, such as voltage-to-frequency and sigma-delta. Like double-ramp ADC variants, the former is too slow at high resolutions. The sigma-delta converter is an efficient and simple pulse modulator and is therefore commonly used in applications requiring a high degree of precision. Converters having a resolution of up to 20 bits have previously been introduced. Like other pulse-modulating converters, the sigma-delta converter requires oversampling. As a rule, the oversampling is 64-256 times the sampling rate required according to the Nyqvist criterion. The oversampling is due to the efficiency of the forming of the frequency spectrum of the quantisation noise by the sigma-delta modulator, as well as to the aimed-at accuracy. This means that the usable bandwidth is fairly low (often 10-100 kHz), and there is need of a substantial reduction of the sampling rate on the outgoing one-bit signal. This i

REFERENCES:
patent: 4940982 (1990-07-01), Gulczynski
patent: 5101206 (1992-03-01), Riedel
patent: 5196853 (1993-03-01), Abbiate et al.

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