Analog-to-digital converter (ADC) with reduced jitter...

Details Analog-to-digital converter (ADC) with reduced jitter... Analog-to-digital converter (ADC) with reduced jitter...

2008-12-09

2010-12-14

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000

Reexamination Certificate

active

07852248

ABSTRACT:
In one embodiment of the present invention, at least at one stage of a Sigma-Delta analog-to-digital converter (ADC) is disclosed to include means for receiving a voltage at least one of the inputs of an operational amplifier, the operational amplifier having at least one output coupled to the at least one of the inputs via an at least one integration capacitor, means for transforming the voltage to a current and means for integrating the current on the at least one of the integration capacitors, during integration time and varying the resistance of at least one of a variable resistors coupled to the operational amplifier during integration time.

REFERENCES:
patent: 6518893 (2003-02-01), Robinson
patent: 6693572 (2004-02-01), Oliaei et al.
patent: 7158064 (2007-01-01), Jensen
patent: 7256724 (2007-08-01), Lee
patent: 2005/0238123 (2005-10-01), Ranganathan et al.

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