Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2001-09-27
2003-02-04
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000, C341S155000, C341S161000, C341S162000
Reexamination Certificate
active
06515606
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to analog to digital converters and in particular, sigma delta modulators. In particular, the invention relates to the incorporation of features from sigma delta modulators into converters of the kind known as pipelined or subranging converters, as described hereinbelow.
2. Description of the Prior Art
Sigma delta modulators are described by, for example, Cho and Gray, JSSC March 1995 pp 166-172, and pipelined (also called subranging) converters, described by, for example, Rabii and Wooley, JSSC June 1997 pp 783-795, are used widely for applications where resolutions in the range 10 to 14 bits are required. In certain applications, it is desirable to sample the input signal at a rate higher than the Nyquist rate, to simplify anti-aliasing, or for other reasons. The extent to which the actual sampling rate exceeds the rate specified by the Nyquist criterion is known as the oversampling ratio (OSR). In general subranging converters are preferred where the highest speed of conversions is required and sigma delta converters are preferred for lower speed where a significant level of oversampling is possible.
In the following sections the sigma delta and subranging converters from the prior art are described in more detail. A new structure combining the advantages of sigma delta and subranging converters is then described.
Subranging Converter
A single stage subranging converter (some times called a half flash converter) is illustrated in FIG.
1
. It consists of first converter comprising an input signal sampler indicated by Vin at reference
1
, a coarse quantizer, (Q
1
)
2
, a digital to analog converter (DAC)
3
, a summing node
4
, a sample and hold amplifier
5
, and a second converter (quantizer Q
2
)
6
. Note that the thin lines in the figures represent analog signals whereas the thicker lines represent digital signals. The input to the DAC
3
comes directly from the coarse quantizer
2
. The input signal Vin is quantized by the coarse quantizer
2
at the same time as it is sampled. The output of the DAC
3
is subtracted from the sampled input signal Vin at the summing node
4
, ensuring that only a residue, the difference between the input quantizer and a coarse estimate of that input sample Vin, is passed to the sample and hold amplifier
5
. This residue will be much smaller than the input signal Vin. For instance, if the coarse quantizer
2
has a resolution of 4 bits, the magnitude of the residues will be limited to {fraction (1/16)} of the maximum magnitude of the input signal Vin. In this residue is passed through the sample and hold amplifier
5
and further quantized by the second quantizer
6
. As the input range of this second quantizer
6
is quite small, the second quantizer
6
itself can be quite small. The net effect is that the total quantization is broken down into two steps, coarse quantization and fine quantization, with the final output being obtained from the digital combiner
9
which uses the sum of the two steps (i.e. the sum of the outputs from the two quantizers) with appropriate delays to account for time differences in outputs from the first quantizers and second quantizer for the same input samples. For instance, a net 8 bit quantization can be achieved with a 4 bit coarse quantizer
2
and DAC
3
and a 4 bit second quantizer
6
. It may he noted that the summing function
4
dues not require special hardware, and happens automatically at the input to the sample and hold amplifier
5
.
Three practical implementation issues may be mentioned. Firstly, it is common practice to design the second quantizer
6
with a range larger than the nominal range of the residue by a factor of 1 bit. This redundancy is referred to as interstage ‘overlap’. This overlap allows for imperfections in the coarse quantizer
2
. Secondly, the DAC
3
must have an accuracy equal to the overall system accuracy, even though this is in excess of the resolution of the DAC
3
. Thirdly, it is common practice to provide signal gain in the sample and hold amplifier
5
, as this cases the accuracy constraints on the second quantizer
6
. Thus, a practical 7 bit subranging converter might consist of two 4 bit accurate 4 bit quantizers
2
and
6
, an 8 bit accurate 4 bit DAC
3
, and an amplifier
5
with a closed loop gain of 16. There are complex design trade-offs in the choice of amplifier gain, since higher gains result in slower amplifier settling times and hence a lower overall speed of operation. Although, subranging converters are efficient at Nyquist rate sampling, they benefit very little from oversampling.
Where the required resolution exceeds 8 bits, it is common to cascade subranging converter stages. In this arrangement, the second quantizer
6
will itself consist of a subranging converter, so that the quantization is shared over three or more quantizers.
Sigma Delta Modulator
A first order sigma delta modulator from the prior art is illustrated in FIG.
2
. It consists of an input sampler at reference
11
, the input being Vin, a DAC
17
, a summing node
18
, a filter means, which in the example shown is an amplifier
15
configured as an integrator, and a coarse quantizer
12
. This coarse quantizer
12
will often consist of a single comparator. The input to DAC
17
comes directly from the coarse quantizer
12
. The output of the filter means (integrator)
15
is quantized by the coarse quantizer
12
, and fed back through the DAC
17
to the summing node
18
, where it is subtracted from the input sample Vin. The output from the course quantizer is also the digital output from the sigma delta converter, although further processing may be done on the signal using digital circuitry. Several techniques are known in the prior art to improve the noise performance of sigma delta converters by implementing bit shuffling in the DAC, see for example Irish Patent Nos. 80450 and S970941. Sigma delta modulators are typically operated at a rate much higher than set by the Nyquist criterion. The combination of negative feedback and the signal gain at low frequencies provided by the integrator
15
, ensures that the feedback signal matches the input signal Vin at low frequencies. The accuracy of the low frequency matching between feedback and input signals will exceed the resolution of the coarse quantizer
12
.
Several other filter means may be used in place of a single integrator, for example two integrators may be used in series. Different filter means may be chosen depending on the required parameters for a given situation, examples of these parameters would include the frequency response of the converter, the Signal to Noise ratio and loop stability of the converter.
A detailed analysis of the operation of sigma delta modulators is complex, see for example, “Delta-sigma Data Converters—Theory, Design and Simulation”, eds. S. R. Norsworthy, R Schreier and G. C. Temes, IEEE Press 1997, ISBN 0-7803-1045-4. However, computer simulations indicate that a first order modulator of the type shown is in
FIG. 2
, with a 3 bit quantizer
12
and a 3 bit DAC
17
, will achieve a resolution of 8 bits, at an oversampling ratio of 64. This resolution will increase by 1.5 bits for every 1 bit increase in the oversampling ratio. If a higher resolution is required at a lower oversampling ratio, then the quantizer resolution must be increased, or a higher order modulator used, as is described in the above-mentioned “Delta-sigma Data Converters—Theory, Design and Simulation”. Alternatively, if a higher oversampling rate is possible, then the quantizer resolution can be reduced while maintaining the same overall system resolution.
Comparison of Sigma Delta and Subranging Converters
It is informative to compare the two foregoing exemplary data converters under the headings of number of quantizers, effect of oversampling, and stage gain.
Number of Quantizers
In the subranging converter of
FIG. 1
, the quantization is spread over two stages, whereas in the sigma delta modulator, see
FIG. 2
, all of the quan
Mai Lam T.
Tokar Michael
University College-Cork National University of Ireland
Young & Thompson
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