Analog-to-digital converter

Details Analog-to-digital converter Analog-to-digital converter

1995-06-07

1998-02-03

Gaffin, Jeffrey A.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341126, 341141, H03M 112

Patent

active

057149550

ABSTRACT:
Serial analog-to-digital converters (ADC) in which power down and power up modes are activated by two dual-purpose input signals are provided. The ADCs of the invention eliminate the need for a dedicated power down input line as found on typical serial ADCs. When commanded to do so, the ADC enters into one of two power down modes, NAP or SLEEP. In NAP mode, only those portions of the ADC circuit which consume current and which are capable of waking up almost instantaneously are powered down. In SLEEP mode, the entire ADC circuit is powered down. When commanded to do so, the ADC enters into a power up mode, applying current to every portion of the ADC circuit. Wake-up from the NAP mode takes place almost instantaneously. Wake-up from the SLEEP mode requires additional time. From either mode, a signal is generated when the ADC conversion circuit, which preferably includes a reference voltage generator, has stabilized sufficiently for the ADC to perform analog-to-digital conversion.

REFERENCES:
patent: 4045719 (1977-08-01), Salzer
patent: 5287525 (1994-02-01), Lum et al.
patent: 5420798 (1995-05-01), Lin et al.
patent: 5543795 (1996-08-01), Fernald
patent: 5557274 (1996-09-01), Hirooka et al.

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