Analog to digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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Details

341118, 341120, 307491, 307494, 307362, H03M 110, H03M 138, H03K 3356, H03K 3023

Patent

active

052627799

ABSTRACT:
There is disclosed an ADC including a comparator which sets, bit-by-bit, a successive approximation binary register. Feedback means for auto-biasing, auto calibration, and offset compensation within the ADC are provided. The ADC sets itself to a high degree of accuracy automatically by reference to a master voltage reference. A number of identical ADCs are connected in parallel to provide an increased sampling rate. The ADC architecture compensates for component tolerance differences, for common mode noise, and for secondary parasitic effects. The ADC operates with high resolution at high speed (e.g., 10 bits at 50 MHz), and can be implemented in MOS technology with good integrated circuit chip yield and is compatible with new ASICs.

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patent: 4385286 (1983-05-01), Haque
patent: 4553128 (1985-11-01), Pilost
patent: 4620179 (1986-10-01), Cooper et al.
patent: 4691189 (1987-09-01), Dingwall
patent: 4940981 (1990-07-01), Naylor et al.
patent: 4989003 (1991-01-01), Sauer
patent: 4999633 (1991-03-01), Draxelmayr
patent: 5028926 (1991-07-01), Tokuhiro
patent: 5032744 (1991-07-01), Wai Yeung Liu

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