Analog to digital conversion with noise reduction

Details Analog to digital conversion with noise reduction Analog to digital conversion with noise reduction

1989-12-15

1991-03-12

Pellinen, A. D.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341166, H03M 152

Patent

active

049996320

ABSTRACT:
An analog-to-digital converter employs a capacitor circuit for integrating a sample of an input signal during a predetermined interval of time and, thereafter, the capacitor is discharged at a predetermined rate until the integration voltage is equal to that of a reference. The discharge time serves as a measure of the amplitude of the input signal. A measurement interval is established which is equal to an integral number of cycles of each of the possible values of frequency of the A.C. excitation. The signal integration interval has a duration less than or approximately equal to the shortest period of the A.C. excitation, this being the period of the highest frequency A.C. excitation. The signal integration is repeated periodically at each third half-cycle of the highest frequency excitation so that the total integration time experienced during positive half cycles is equal to that experienced during negative half cycles of any of the plurality of excitation frequencies. This cancels the effect of noise due to signal polarity.

REFERENCES:
patent: 3696403 (1972-10-01), DiRocco
patent: 3701146 (1972-10-01), Haga et al.
patent: 3729733 (1973-04-01), Dorey
patent: 4633221 (1986-12-01), Bradshaw et al.
patent: 4656459 (1987-04-01), Thurber, Jr.
patent: 4908623 (1990-03-01), Ullestad

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