Analog-to-digital conversion system

Details Analog-to-digital conversion system Analog-to-digital conversion system

2000-05-05

2001-07-31

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S139000, C341S156000

Reexamination Certificate

active

06268820

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to analog-to-digital conversion systems and more particularly to analog-to-digital conversion systems adapted to convert a plurality of analog signals into corresponding digital signals, or words.
As is known in the art, analog-to-digital (ADCs) have a wide range of applications. In some applications, it is required that more than one analog signal be converted into a corresponding digital signal. One arrangement is shown in FIG.
1
. In such an arrangement, the analog signals, here N analog signals, are fed to the input of a multiplexer (MUX). A control, or select, signal is fed to the multiplexer and the multiplexer couples one of the plurality of analog signals to an analog-to-digital converter (ADC) selectively in accordance with the control signal. The ADC produces a new conversion result at an update rate, or conversion period of T
ADC
seconds. However, after the multiplexer, in response to the control signal, changes from one input signal to another input signal, a number of conversion periods may be required before a valid, settled ADC result is produced, i.e., T
SETTLE
≧T
ADC
, as indicated in FIG.
2
.
A particular example of this is with a sigma-delta ADC featuring a second order sigma-delta modulator plus a third-order (sinc
3
) decimation filter. This particular ADC will not produce a valid result until a time period of T
SETTLE
=3*T
ADC
has elapsed because it takes the sinc
3
filter
3
outputs update periods to settle (i.e., T
SETTLE
=3*T
SINC3
. In the case where this ADC is chopped, as described in U.S. Pat. No. 5,675,334, T
SETTLE
=2*T
ADC
. Thus, for a chopped ADC, T
ADC
=3*T
SINC3
, so that T
SETTLE
=6*T
SINC3
. If two independent inputs are to be converted with this chopped ADC, the time required will therefore be equal to 2*T
SETTLE
, i.e., 4*T
ADC
.
Another approach for converting more than one input analog signal is to use a separate ADC for each analog signal. For example, one such an arrangement is shown in
FIG. 3
for two analog signals. Both ADCs convert simultaneously. Both ADCs are identical and are therefore capable of the same performance. That is, in the analog-to-digital conversion process, noise internal to the converter is generated. For example, with a switched capacitor sigma delta ADC, there is thermal noise generated. One way to increase the ADC's performance, more particularly, increase the resolution of the input signal in the presence of this thermally generated internal noise, is to increase the size of the capacitors used in the switching networks of the ADC. Increasing the size of the capacitors, however, increases the power required by the ADC and also increases the chip area required for the ADC. Another way to increase performance, here again by increasing the resolution of the input signal in the presence of this thermally generated internal noise is to increase the gain provided to the analog input signal. This, however, also requires an increase in the power required for the ADC. Thus, as the performance of an ADC is increased, the power and chip area required for the ADC generally increases. A third way to increase performance is to include a high impedance buffer for the ADC to reduce the loading effect of the ADC on the analog signal source. A fourth way the performance of an ADC may be improved is to increase the conversion rate of the ADC.
Thus, an increase in performance may be achieved by: increasing the resolution of the input signal in the presence of thermally generated noise and/or providing a high input impedance to the ADC and/or increasing the conversion rate of the ADC and/or increasing the gain of the ADC. Thus, if a first ADC has, relative to a second ADC, a higher resolution of the input signal in the presence of thermally generated noise and/or a higher input impedance to the ADC and/or a higher conversion rate and/or higher gain, the first ADC has, as defined herein, a higher degree of performance than the second ADC.
SUMMARY
In accordance with the present invention, an analog to digital conversion system is provided having a plurality of analog to digital converters. Each one of such converters is configured to convert a corresponding one of a plurality of analog signals into a corresponding digital signal in response to pulses fed to such one of the converters. The converters perform such conversion with different degrees of conversion performance.
In one embodiment of the invention, the ADCs perform such conversion with different input signal to internal noise resolutions.
In another embodiment of the invention, the ADCs perform such conversion with different conversion rates.
In yet another embodiment of the invention, the ADCs have different input impedances.
In still yet another embodiment of the invention, the ADCs have different gains.
In accordance with another feature of the invention a controller is provided for interrupting and/or changing the configuration of one or more of the ADCs. The controller provides the interrupt and/or change in configuration with a priority to one of the ADCs over the other one of the ADCs.
With such an arrangement, a relatively higher throughput for a given power dissipation is achieved compared with a multiplexed ADC. Further, the invention allows for lower power in a main/auxiliary signal scenario compared to a system, which uses two identical ADCs. Thus, in applications which require converting a main (i.e., primary) input signal and a secondary signal, as for example in a thermocouple temperature transducer that requires an auxiliary measurement of a “cold junction”, the auxiliary input signal is processed with the main input signal to compensate the main measurement for influence of the auxiliary input. In such application, the auxiliary input typically may not need to be calculated as often as the main input signal, and does not need to be measured as accurately.
In accordance with the invention, an analog to digital conversion system is provided having a plurality of analog to digital converters (ADCs). Each one of such ADCs is configured to convert a corresponding one of a plurality of analog signals into a corresponding sequence of digital words. The ADCs perform such conversion with different degrees of performance. A source of the pulses is included. Each one of the ADCs is configured to provide a corresponding one of the sequences of digital words in response to the pulses. Each one of the digital words in each of the sequences is provided at substantially the same time.
In accordance with still another feature of the invention, a analog to digital conversion system is provided comprising: a plurality of analog to digital converters, each one of such converters being configured to convert a corresponding one of a plurality of analog signals into a corresponding digital signal in response to pulses fed to such one of the converters, such converters performing such conversion with different degrees of conversion performances; and, a common source of the pulses for enabling the plurality of converter ADCs to convert the analog signals fed thereto synchronously.
In accordance with another feature of the invention, an analog to digital conversion system is provided comprising: a plurality of analog to digital converters, each one of such converters being configured to convert a corresponding one of a plurality of analog signals into a corresponding digital signal in response to pulses fed to such one of the converters, a first one of such converters performing such conversion with higher degree of conversion performance than a second one of the converters; and wherein the second one of the converts consumes less power than the first one of the converters.
In accordance with still another feature of the invention, an analog to digital conversion system is provided comprising: an integrated circuit chip having formed thereon: a plurality of analog to digital converters, each one of such converters being configured to convert a corresponding one of a plur

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