Analog-to-digital conversion method and apparatus with a control

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341122, 341118, 307451, 307576, 307353, H03M 114, H03K 100

Patent

active

052473015

ABSTRACT:
An analog-to-digital converter receiving an analog signal and producing a digital output signal corresponding to a value of the analog signal includes a plurality of sets each having a plurality of sample-and-hold circuits having inputs connected in parallel with each other, an analog switch responsive to a control signal to apply the input analog signal to the junction of the parallel connection of the plurality of sample-and-hold circuits, and a plurality of encoders respectively connected to outputs of the plurality of sets to convert output signals of the plurality of sample-and-hold circuits into a binary signal. Each of the plurality of sample-and-hold circuits includes a series connection of a second analog switch and a capacitor and the analog-to-digital converter further includes comparators connected to outputs of the plurality of sample-and-hold circuits. Advantageously, errors in timing for sampling conducted in the plurality of sample-and-hold circuits can be eliminated.

REFERENCES:
patent: 3697978 (1972-10-01), Prill
patent: 4612531 (1986-09-01), Dingwall et al.
patent: 4745393 (1988-05-01), Tsukada et al.
patent: 5075688 (1991-12-01), Hosotani et al.
N. Fukushima, et al., "A CMOS 40MHz 8b 105mW Two-Step ADC", ISCC 89/Wed., Feb. 15, 1989, pp. 14-15.
T. Matsuura, et al., "An 8-b 50 MHz 225-mW Submicron CMOS ADC Using Saturation Eliminated Comparators", IEEE 1990 Custom Integrated Circuits Conference, pp. 6.4.1-6.4.4.

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