Analog-to-digital conversion method and apparatus

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340347AD, 340347SH, H03K 1302

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043452418

ABSTRACT:
A high speed analog-to-digital conversion method and apparatus including a plurality of parallel analog-to-digital converters is disclosed. A clock signal is applied to each of the analog-to-digital converters at different phase relation to increase the equivalent sampling frequency by multiplexing the outputs into a serial form. A reference signal such as a linear ramp or sawtooth signal is used to maintain the correct phase relation, thereby eliminating any errors due to differences in electrical characteristics among the analog-to-digital converters. Such correction may be performed automatically by using a CPU before digitizing an analog input signal or at any desired time.

REFERENCES:
Kawade, "Electronics and Communications in Japan", vol. 58--A, No. 2, Feb. 1975, pp. 11-20.
Ottesen, "IBM Technical Disclosure Bulletin", vol. 8, No. 7, Dec. 1965, pp. 956-957.

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