Coded data generation or conversion – Converter compensation
Reexamination Certificate
2005-05-31
2005-05-31
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Converter compensation
C341S162000
Reexamination Certificate
active
06900749
ABSTRACT:
Digital signals of the most significant bit to the least significant bit are supplied to a digital calibration operation unit from a redundancy correction circuit, and an intermediate high order 2-bit digital signal is supplied to a correction value selection circuit. A DC control signal is supplied to the correction value selection circuit. A plurality of groups of correction values corresponding to the values of the intermediate high order 2-bit digital signal are stored in advance in a correction value ROM. The correction value selection circuit reads out a correction value from the correction value ROM based on the DC control signal and the intermediate high order 2-bit digital signal. The digital calibration operation unit adds the correction value AM to the digital signals of the most significant bit to the least significant bit, and outputs a resulting value as a digital output value.
REFERENCES:
patent: 5047772 (1991-09-01), Ribner
patent: 5635937 (1997-06-01), Lim et al.
patent: 6304206 (2001-10-01), Wada et al.
patent: 6369744 (2002-04-01), Chuang
patent: 9-69776 (1997-03-01), None
patent: 11-88172 (1999-03-01), None
Kobayashi Shigeto
Tani Kuniyuki
Wada Atsushi
Sanyo Electric Co,. Ltd.
Williams Howard L.
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